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BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863 The intention of PlatformInitLib is to extract the common function used in OvmfPkg/PlatformPei. This lib will be used not only in PEI phase but also in SEC phase. SEC phase cannot use global variables between different functions. So PlatformInfoHob is created to hold the informations shared between functions. For example, HostBridgeDevId corespond to mHostBridgeDevId in PlatformPei. In this patch we will first move below global variables to PlatformInfoHob. - mBootMode - mS3Supported - mPhysMemAddressWidth - mMaxCpuCount - mHostBridgeDevId - mQ35SmramAtDefaultSmbase - mQemuUc32Base - mS3AcpiReservedMemorySize - mS3AcpiReservedMemoryBase PlatformInfoHob also holds other information, for example, PciIoBase / PciIoSize. This is because in SEC phase, PcdSetxxx doesn't work. So we will restruct the functions which set PCDs into two, one for PlatformInfoLib, one for PlatformPei. So in this patch we first move global variables and PCDs to PlatformInfoHob. All the changes are in OvmfPkg/PlatformPei. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Sebastien Boeuf <sebastien.boeuf@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
/** @file
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Build FV related hobs for platform.
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Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "PiPei.h"
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#include "Platform.h"
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#include <Library/DebugLib.h>
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#include <Library/HobLib.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/PcdLib.h>
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/**
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Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
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and DXE know about them.
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@retval EFI_SUCCESS Platform PEI FVs were initialized successfully.
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**/
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EFI_STATUS
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PeiFvInitialization (
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VOID
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)
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{
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BOOLEAN SecureS3Needed;
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DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));
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//
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// Create a memory allocation HOB for the PEI FV.
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//
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// Allocate as ACPI NVS is S3 is supported
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//
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BuildMemoryAllocationHob (
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PcdGet32 (PcdOvmfPeiMemFvBase),
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PcdGet32 (PcdOvmfPeiMemFvSize),
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mPlatformInfoHob.S3Supported ? EfiACPIMemoryNVS : EfiBootServicesData
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);
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//
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// Let DXE know about the DXE FV
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//
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BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSize));
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SecureS3Needed = mPlatformInfoHob.S3Supported && mPlatformInfoHob.SmmSmramRequire;
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//
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// Create a memory allocation HOB for the DXE FV.
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//
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// If "secure" S3 is needed, then SEC will decompress both PEI and DXE
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// firmware volumes at S3 resume too, hence we need to keep away the OS from
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// DXEFV as well. Otherwise we only need to keep away DXE itself from the
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// DXEFV area.
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//
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BuildMemoryAllocationHob (
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PcdGet32 (PcdOvmfDxeMemFvBase),
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PcdGet32 (PcdOvmfDxeMemFvSize),
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SecureS3Needed ? EfiACPIMemoryNVS : EfiBootServicesData
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);
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//
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// Additionally, said decompression will use temporary memory above the end
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// of DXEFV, so let's keep away the OS from there too.
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//
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if (SecureS3Needed) {
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UINT32 DxeMemFvEnd;
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DxeMemFvEnd = PcdGet32 (PcdOvmfDxeMemFvBase) +
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PcdGet32 (PcdOvmfDxeMemFvSize);
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BuildMemoryAllocationHob (
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DxeMemFvEnd,
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PcdGet32 (PcdOvmfDecompressionScratchEnd) - DxeMemFvEnd,
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EfiACPIMemoryNVS
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);
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}
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//
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// Let PEI know about the DXE FV so it can find the DXE Core
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//
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PeiServicesInstallFvInfoPpi (
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NULL,
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(VOID *)(UINTN)PcdGet32 (PcdOvmfDxeMemFvBase),
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PcdGet32 (PcdOvmfDxeMemFvSize),
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NULL,
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NULL
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);
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return EFI_SUCCESS;
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}
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