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ea1312a5b4
Add the BTI instructions and the associated note to make the AArch64 asm objects compatible with BTI enforcement. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
151 lines
3.8 KiB
ArmAsm
151 lines
3.8 KiB
ArmAsm
#
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# Copyright (c) 2014-2018, Linaro Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#
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.text
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.align 3
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GCC_ASM_EXPORT(MmioRead8Internal)
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GCC_ASM_EXPORT(MmioWrite8Internal)
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GCC_ASM_EXPORT(MmioRead16Internal)
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GCC_ASM_EXPORT(MmioWrite16Internal)
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GCC_ASM_EXPORT(MmioRead32Internal)
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GCC_ASM_EXPORT(MmioWrite32Internal)
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GCC_ASM_EXPORT(MmioRead64Internal)
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GCC_ASM_EXPORT(MmioWrite64Internal)
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//
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// Reads an 8-bit MMIO register.
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//
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// Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
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// returned. This function must guarantee that all MMIO read and write
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// operations are serialized.
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//
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// @param Address The MMIO register to read.
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//
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// @return The value read.
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//
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ASM_PFX(MmioRead8Internal):
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AARCH64_BTI(c)
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ldrb w0, [x0]
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dmb ld
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ret
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//
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// Writes an 8-bit MMIO register.
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//
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// Writes the 8-bit MMIO register specified by Address with the value specified
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// by Value and returns Value. This function must guarantee that all MMIO read
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// and write operations are serialized.
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//
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// @param Address The MMIO register to write.
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// @param Value The value to write to the MMIO register.
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//
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ASM_PFX(MmioWrite8Internal):
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AARCH64_BTI(c)
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dmb st
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strb w1, [x0]
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ret
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//
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// Reads a 16-bit MMIO register.
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//
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// Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
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// returned. This function must guarantee that all MMIO read and write
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// operations are serialized.
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//
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// @param Address The MMIO register to read.
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//
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// @return The value read.
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//
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ASM_PFX(MmioRead16Internal):
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AARCH64_BTI(c)
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ldrh w0, [x0]
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dmb ld
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ret
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//
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// Writes a 16-bit MMIO register.
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//
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// Writes the 16-bit MMIO register specified by Address with the value specified
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// by Value and returns Value. This function must guarantee that all MMIO read
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// and write operations are serialized.
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//
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// @param Address The MMIO register to write.
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// @param Value The value to write to the MMIO register.
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//
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ASM_PFX(MmioWrite16Internal):
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AARCH64_BTI(c)
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dmb st
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strh w1, [x0]
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ret
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//
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// Reads a 32-bit MMIO register.
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//
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// Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
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// returned. This function must guarantee that all MMIO read and write
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// operations are serialized.
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//
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// @param Address The MMIO register to read.
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//
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// @return The value read.
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//
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ASM_PFX(MmioRead32Internal):
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AARCH64_BTI(c)
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ldr w0, [x0]
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dmb ld
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ret
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//
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// Writes a 32-bit MMIO register.
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//
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// Writes the 32-bit MMIO register specified by Address with the value specified
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// by Value and returns Value. This function must guarantee that all MMIO read
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// and write operations are serialized.
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//
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// @param Address The MMIO register to write.
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// @param Value The value to write to the MMIO register.
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//
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ASM_PFX(MmioWrite32Internal):
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AARCH64_BTI(c)
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dmb st
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str w1, [x0]
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ret
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//
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// Reads a 64-bit MMIO register.
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//
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// Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
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// returned. This function must guarantee that all MMIO read and write
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// operations are serialized.
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//
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// @param Address The MMIO register to read.
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//
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// @return The value read.
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//
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ASM_PFX(MmioRead64Internal):
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AARCH64_BTI(c)
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ldr x0, [x0]
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dmb ld
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ret
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//
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// Writes a 64-bit MMIO register.
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//
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// Writes the 64-bit MMIO register specified by Address with the value specified
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// by Value and returns Value. This function must guarantee that all MMIO read
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// and write operations are serialized.
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//
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// @param Address The MMIO register to write.
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// @param Value The value to write to the MMIO register.
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//
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ASM_PFX(MmioWrite64Internal):
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AARCH64_BTI(c)
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dmb st
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str x1, [x0]
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ret
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