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387fcf4fa1
Instead of relying on a protocol notification event to register the core IRQ interrupt handler with CPU arch protocol once it becomes available, use a DEPEX to ensure that the GIC driver is not dispatched at all until the CPU arch protocol has turned up. This will allow the GIC driver to use other CPU arch protocol methods, such as the ones needed to map the GIC MMIO regions at driver startup. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
154 lines
3.0 KiB
C
154 lines
3.0 KiB
C
/*++
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Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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--*/
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#ifndef ARM_GIC_DXE_H_
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#define ARM_GIC_DXE_H_
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#include <Library/ArmGicLib.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiLib.h>
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#include <Protocol/Cpu.h>
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#include <Protocol/HardwareInterrupt.h>
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#include <Protocol/HardwareInterrupt2.h>
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extern UINTN mGicNumInterrupts;
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extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;
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extern EFI_CPU_ARCH_PROTOCOL *gCpuArch;
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// Common API
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EFI_STATUS
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InstallAndRegisterInterruptService (
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IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
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IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
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IN EFI_EVENT_NOTIFY ExitBootServicesEvent
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);
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EFI_STATUS
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EFIAPI
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RegisterInterruptSource (
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IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
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IN HARDWARE_INTERRUPT_SOURCE Source,
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IN HARDWARE_INTERRUPT_HANDLER Handler
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);
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// GicV2 API
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EFI_STATUS
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GicV2DxeInitialize (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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// GicV3 API
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EFI_STATUS
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GicV3DxeInitialize (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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// Shared code
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/**
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Calculate GICD_ICFGRn base address and corresponding bit
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field Int_config[1] of the GIC distributor register.
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@param Source Hardware source of the interrupt.
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@param RegAddress Corresponding GICD_ICFGRn base address.
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@param Config1Bit Bit number of F Int_config[1] bit in the register.
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@retval EFI_SUCCESS Source interrupt supported.
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@retval EFI_UNSUPPORTED Source interrupt is not supported.
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**/
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EFI_STATUS
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GicGetDistributorIcfgBaseAndBit (
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IN HARDWARE_INTERRUPT_SOURCE Source,
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OUT UINTN *RegAddress,
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OUT UINTN *Config1Bit
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);
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UINT32
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EFIAPI
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ArmGicGetInterfaceIdentification (
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IN UINTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicDisableDistributor (
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IN UINTN GicDistributorBase
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);
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UINTN
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EFIAPI
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ArmGicGetMaxNumInterrupts (
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IN UINTN GicDistributorBase
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);
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UINT32
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EFIAPI
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ArmGicV3GetControlSystemRegisterEnable (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3SetControlSystemRegisterEnable (
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IN UINT32 ControlSystemRegisterEnable
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);
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VOID
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EFIAPI
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ArmGicV3EnableInterruptInterface (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3DisableInterruptInterface (
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VOID
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);
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UINTN
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EFIAPI
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ArmGicV3AcknowledgeInterrupt (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3EndOfInterrupt (
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IN UINTN Source
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);
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VOID
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ArmGicV3SetBinaryPointer (
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IN UINTN BinaryPoint
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);
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VOID
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ArmGicV3SetPriorityMask (
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IN UINTN Priority
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);
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UINTN
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ArmGicV3GetControlRegister (
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VOID
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);
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VOID
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ArmGicV3SetControlRegister (
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IN UINTN Value
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);
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#endif // ARM_GIC_DXE_H_
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