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AsmMacroIoLib.h and AsmMacroIoLibV8.h are used by the CompilerIntrinsicsLib, which is moving to MdePkg. These functions provide standard definitions for ARM/AARCH64 assembly code, respectively, and so are moved to the arch directories in MdePkg to avoid MdePkg having a dependency on ArmPkg. Now that the files are in Arm/ and AArch64/ directories, the filenames are changed to AsmMacroLib.h as we can distinguish the architecture from the path. AsmMacroIoLib.inc is unused and so is removed. Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
186 lines
4.1 KiB
ArmAsm
186 lines
4.1 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
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# Copyright (c) 2016, Linaro Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroLib.h>
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.set DAIF_RD_FIQ_BIT, (1 << 6)
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.set DAIF_RD_IRQ_BIT, (1 << 7)
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.set SCTLR_ELx_M_BIT_POS, (0)
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ASM_FUNC(ArmReadMidr)
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mrs x0, midr_el1 // Read from Main ID Register (MIDR)
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ret
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ASM_FUNC(ArmCacheInfo)
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mrs x0, ctr_el0 // Read from Cache Type Regiter (CTR)
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ret
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ASM_FUNC(ArmGetInterruptState)
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mrs x0, daif
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tst w0, #DAIF_RD_IRQ_BIT // Check if IRQ is enabled. Enabled if 0 (Z=1)
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cset w0, eq // if Z=1 return 1, else 0
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ret
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ASM_FUNC(ArmGetFiqState)
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mrs x0, daif
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tst w0, #DAIF_RD_FIQ_BIT // Check if FIQ is enabled. Enabled if 0 (Z=1)
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cset w0, eq // if Z=1 return 1, else 0
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ret
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ASM_FUNC(ArmWriteCpacr)
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msr cpacr_el1, x0 // Coprocessor Access Control Reg (CPACR)
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ret
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ASM_FUNC(ArmWriteAuxCr)
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EL1_OR_EL2(x1)
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1:msr actlr_el1, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
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ret
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2:msr actlr_el2, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
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ret
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ASM_FUNC(ArmReadAuxCr)
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EL1_OR_EL2(x1)
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1:mrs x0, actlr_el1 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
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ret
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2:mrs x0, actlr_el2 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
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ret
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ASM_FUNC(ArmSetTTBR0)
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EL1_OR_EL2(x1)
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1:msr ttbr0_el1, x0 // Translation Table Base Reg 0 (TTBR0)
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b 4f
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2:msr ttbr0_el2, x0 // Translation Table Base Reg 0 (TTBR0)
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4:isb
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ret
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ASM_FUNC(ArmGetTTBR0BaseAddress)
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EL1_OR_EL2(x1)
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1:mrs x0, ttbr0_el1
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b 3f
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2:mrs x0, ttbr0_el2
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3:and x0, x0, 0xFFFFFFFFFFFF /* Look at bottom 48 bits */
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isb
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ret
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ASM_FUNC(ArmGetTCR)
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EL1_OR_EL2(x1)
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1:mrs x0, tcr_el1
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b 4f
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2:mrs x0, tcr_el2
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4:isb
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ret
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ASM_FUNC(ArmSetTCR)
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EL1_OR_EL2(x1)
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1:msr tcr_el1, x0
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b 4f
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2:msr tcr_el2, x0
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4:isb
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ret
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ASM_FUNC(ArmGetMAIR)
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EL1_OR_EL2(x1)
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1:mrs x0, mair_el1
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b 4f
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2:mrs x0, mair_el2
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4:isb
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ret
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ASM_FUNC(ArmSetMAIR)
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EL1_OR_EL2(x1)
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1:msr mair_el1, x0
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b 4f
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2:msr mair_el2, x0
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4:isb
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ret
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//
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//VOID
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//ArmUpdateTranslationTableEntry (
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// IN VOID *TranslationTableEntry // X0
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// IN VOID *MVA // X1
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// );
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ASM_FUNC(ArmUpdateTranslationTableEntry)
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dsb nshst
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lsr x1, x1, #12
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EL1_OR_EL2(x2)
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1: tlbi vaae1, x1 // TLB Invalidate VA , EL1
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mrs x2, sctlr_el1
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b 4f
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2: tlbi vae2, x1 // TLB Invalidate VA , EL2
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mrs x2, sctlr_el2
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4: tbnz x2, SCTLR_ELx_M_BIT_POS, 5f
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dc ivac, x0 // invalidate in Dcache if MMU is still off
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5: dsb nsh
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isb
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ret
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ASM_FUNC(ArmInvalidateTlb)
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EL1_OR_EL2(x0)
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1: tlbi vmalle1
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b 4f
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2: tlbi alle2
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4: dsb sy
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isb
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ret
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ASM_FUNC(ArmCallWFE)
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wfe
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ret
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ASM_FUNC(ArmCallSEV)
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sev
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ret
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ASM_FUNC(ArmReadCpuActlr)
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mrs x0, S3_1_c15_c2_0
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ret
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ASM_FUNC(ArmWriteCpuActlr)
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msr S3_1_c15_c2_0, x0
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dsb sy
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isb
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ret
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ASM_FUNC(ArmReadSctlr)
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EL1_OR_EL2(x1)
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1:mrs x0, sctlr_el1
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ret
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2:mrs x0, sctlr_el2
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ret
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ASM_FUNC(ArmWriteSctlr)
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EL1_OR_EL2(x1)
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1:msr sctlr_el1, x0
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ret
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2:msr sctlr_el2, x0
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ret
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ASM_FUNC(ArmGetPhysicalAddressBits)
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mrs x0, id_aa64mmfr0_el1
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adr x1, .LPARanges
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and x0, x0, #0xf
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ldrb w0, [x1, x0]
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ret
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//
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// Bits 0..3 of the AA64MFR0_EL1 system register encode the size of the
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// physical address space support on this CPU:
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// 0 == 32 bits, 1 == 36 bits, etc etc
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// 7 and up are reserved
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//
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.LPARanges:
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.byte 32, 36, 40, 42, 44, 48, 52, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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