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For the most part, OVMF will clear the encryption bit for MMIO regions, but there is currently one known exception during SEC when the APIC base address is accessed via MMIO with the encryption bit set for SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special handling on the hypervisor side which may not be available in the future[1], so make the necessary changes in the SEC-configured page table to clear the encryption bit for 4K region containing the APIC base address. [1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsaesw@amd.com/#t Suggested-by: Tom Lendacky <thomas.lendacky@amd.com> Cc: Ard Biesheuvel <ardb@kernel.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jianyong Wu <jianyong.wu@arm.com> Cc: Anatol Belski <anbelski@linux.microsoft.com> Signed-off-by: Michael Roth <michael.roth@amd.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
362 lines
9.0 KiB
C
362 lines
9.0 KiB
C
/** @file
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File defines the Sec routines for the AMD SEV
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Copyright (c) 2021, Advanced Micro Devices, Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/BaseLib.h>
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#include <Library/CpuLib.h>
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#include <Library/CpuPageTableLib.h>
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#include <Library/DebugLib.h>
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#include <Library/LocalApicLib.h>
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#include <Library/MemEncryptSevLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Register/Amd/Ghcb.h>
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#include <Register/Amd/Msr.h>
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#include "AmdSev.h"
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/**
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Handle an SEV-ES/GHCB protocol check failure.
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Notify the hypervisor using the VMGEXIT instruction that the SEV-ES guest
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wishes to be terminated.
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@param[in] ReasonCode Reason code to provide to the hypervisor for the
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termination request.
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**/
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VOID
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SevEsProtocolFailure (
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IN UINT8 ReasonCode
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)
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{
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MSR_SEV_ES_GHCB_REGISTER Msr;
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//
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// Use the GHCB MSR Protocol to request termination by the hypervisor
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//
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Msr.GhcbPhysicalAddress = 0;
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Msr.GhcbTerminate.Function = GHCB_INFO_TERMINATE_REQUEST;
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Msr.GhcbTerminate.ReasonCodeSet = GHCB_TERMINATE_GHCB;
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Msr.GhcbTerminate.ReasonCode = ReasonCode;
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
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AsmVmgExit ();
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ASSERT (FALSE);
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CpuDeadLoop ();
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}
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/**
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Determine if SEV-SNP is active.
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@retval TRUE SEV-SNP is enabled
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@retval FALSE SEV-SNP is not enabled
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**/
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BOOLEAN
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SevSnpIsEnabled (
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VOID
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)
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{
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MSR_SEV_STATUS_REGISTER Msr;
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//
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// Read the SEV_STATUS MSR to determine whether SEV-SNP is active.
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//
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Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS);
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//
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// Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
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//
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if (Msr.Bits.SevSnpBit) {
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return TRUE;
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}
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return FALSE;
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}
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/**
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Register the GHCB GPA
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*/
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STATIC
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VOID
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SevSnpGhcbRegister (
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EFI_PHYSICAL_ADDRESS Address
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)
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{
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MSR_SEV_ES_GHCB_REGISTER Msr;
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//
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// Use the GHCB MSR Protocol to request to register the GPA.
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//
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Msr.GhcbPhysicalAddress = Address & ~EFI_PAGE_MASK;
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Msr.GhcbGpaRegister.Function = GHCB_INFO_GHCB_GPA_REGISTER_REQUEST;
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
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AsmVmgExit ();
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Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
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//
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// If hypervisor responded with a different GPA than requested then fail.
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//
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if ((Msr.GhcbGpaRegister.Function != GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE) ||
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((Msr.GhcbPhysicalAddress & ~EFI_PAGE_MASK) != Address))
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{
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SevEsProtocolFailure (GHCB_TERMINATE_GHCB_GENERAL);
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}
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}
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/**
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Verify that Hypervisor supports the SNP feature.
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*/
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STATIC
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BOOLEAN
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HypervisorSnpFeatureCheck (
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VOID
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)
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{
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MSR_SEV_ES_GHCB_REGISTER Msr;
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UINT64 Features;
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//
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// Use the GHCB MSR Protocol to query the hypervisor capabilities
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//
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Msr.GhcbPhysicalAddress = 0;
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Msr.GhcbHypervisorFeatures.Function = GHCB_HYPERVISOR_FEATURES_REQUEST;
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
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AsmVmgExit ();
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Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
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Features = RShiftU64 (Msr.GhcbPhysicalAddress, 12);
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if ((Msr.GhcbHypervisorFeatures.Function != GHCB_HYPERVISOR_FEATURES_RESPONSE) ||
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(!(Features & GHCB_HV_FEATURES_SNP)))
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{
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return FALSE;
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}
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return TRUE;
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}
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/**
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Validate the SEV-ES/GHCB protocol level.
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Verify that the level of SEV-ES/GHCB protocol supported by the hypervisor
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and the guest intersect. If they don't intersect, request termination.
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**/
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VOID
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SevEsProtocolCheck (
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VOID
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)
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{
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MSR_SEV_ES_GHCB_REGISTER Msr;
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GHCB *Ghcb;
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//
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// Use the GHCB MSR Protocol to obtain the GHCB SEV-ES Information for
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// protocol checking
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//
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Msr.GhcbPhysicalAddress = 0;
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Msr.GhcbInfo.Function = GHCB_INFO_SEV_INFO_GET;
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
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AsmVmgExit ();
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Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
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if (Msr.GhcbInfo.Function != GHCB_INFO_SEV_INFO) {
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SevEsProtocolFailure (GHCB_TERMINATE_GHCB_GENERAL);
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}
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if (Msr.GhcbProtocol.SevEsProtocolMin > Msr.GhcbProtocol.SevEsProtocolMax) {
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SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
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}
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if ((Msr.GhcbProtocol.SevEsProtocolMin > GHCB_VERSION_MAX) ||
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(Msr.GhcbProtocol.SevEsProtocolMax < GHCB_VERSION_MIN))
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{
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SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
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}
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//
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// We cannot use the MemEncryptSevSnpIsEnabled () because the
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// ProcessLibraryConstructorList () is not called yet.
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//
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if (SevSnpIsEnabled ()) {
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//
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// Check if hypervisor supports the SNP feature
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//
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if (!HypervisorSnpFeatureCheck ()) {
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SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
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}
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//
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// Unlike the SEV-ES guest, the SNP requires that GHCB GPA must be
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// registered with the Hypervisor before the use. This can be done
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// using the new VMGEXIT defined in the GHCB v2. Register the GPA
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// before it is used.
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//
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SevSnpGhcbRegister ((EFI_PHYSICAL_ADDRESS)(UINTN)FixedPcdGet32 (PcdOvmfSecGhcbBase));
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}
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//
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// SEV-ES protocol checking succeeded, set the initial GHCB address
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//
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Msr.GhcbPhysicalAddress = FixedPcdGet32 (PcdOvmfSecGhcbBase);
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
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Ghcb = Msr.Ghcb;
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SetMem (Ghcb, FixedPcdGet32 (PcdOvmfSecGhcbSize), 0);
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//
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// Set the version to the maximum that can be supported
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//
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Ghcb->ProtocolVersion = MIN (Msr.GhcbProtocol.SevEsProtocolMax, GHCB_VERSION_MAX);
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Ghcb->GhcbUsage = GHCB_STANDARD_USAGE;
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}
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/**
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Determine if the SEV is active.
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During the early booting, GuestType is set in the work area. Verify that it
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is an SEV guest.
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@retval TRUE SEV is enabled
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@retval FALSE SEV is not enabled
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**/
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BOOLEAN
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IsSevGuest (
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VOID
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)
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{
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OVMF_WORK_AREA *WorkArea;
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//
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// Ensure that the size of the Confidential Computing work area header
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// is same as what is provided through a fixed PCD.
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//
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ASSERT (
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(UINTN)FixedPcdGet32 (PcdOvmfConfidentialComputingWorkAreaHeader) ==
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sizeof (CONFIDENTIAL_COMPUTING_WORK_AREA_HEADER)
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);
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WorkArea = (OVMF_WORK_AREA *)FixedPcdGet32 (PcdOvmfWorkAreaBase);
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return ((WorkArea != NULL) && (WorkArea->Header.GuestType == CcGuestTypeAmdSev));
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}
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/**
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Determine if SEV-ES is active.
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During early booting, SEV-ES support code will set a flag to indicate that
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SEV-ES is enabled. Return the value of this flag as an indicator that SEV-ES
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is enabled.
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@retval TRUE SEV-ES is enabled
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@retval FALSE SEV-ES is not enabled
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**/
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BOOLEAN
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SevEsIsEnabled (
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VOID
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)
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{
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SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
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if (!IsSevGuest ()) {
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return FALSE;
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}
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SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
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return ((SevEsWorkArea->SevStatusMsrValue & BIT1) != 0);
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}
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/**
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Validate System RAM used for decompressing the PEI and DXE firmware volumes
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when SEV-SNP is active. The PCDs SecValidatedStart and SecValidatedEnd are
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set in OvmfPkg/Include/Fdf/FvmainCompactScratchEnd.fdf.inc.
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**/
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VOID
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SecValidateSystemRam (
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VOID
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)
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{
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PHYSICAL_ADDRESS Start, End;
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if (IsSevGuest () && SevSnpIsEnabled ()) {
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Start = (EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32 (PcdOvmfSecValidatedStart);
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End = (EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32 (PcdOvmfSecValidatedEnd);
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MemEncryptSevSnpPreValidateSystemRam (Start, EFI_SIZE_TO_PAGES ((UINTN)(End - Start)));
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}
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}
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/**
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Map known MMIO regions unencrypted if SEV-ES is active.
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During early booting, page table entries default to having the encryption bit
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set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an address, the
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encryption bit should be cleared. Clear it here for any known MMIO accesses
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during SEC, which is currently just the APIC base address.
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**/
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VOID
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SecMapApicBaseUnencrypted (
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VOID
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)
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{
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PHYSICAL_ADDRESS Cr3;
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UINT64 ApicAddress;
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VOID *Buffer;
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UINTN BufferSize;
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IA32_MAP_ATTRIBUTE MapAttribute;
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IA32_MAP_ATTRIBUTE MapMask;
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RETURN_STATUS Status;
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if (!SevEsIsEnabled ()) {
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return;
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}
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ApicAddress = (UINT64)GetLocalApicBaseAddress ();
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Buffer = (VOID *)(UINTN)FixedPcdGet32 (PcdOvmfSecApicPageTableBase);
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Cr3 = AsmReadCr3 ();
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MapAttribute.Uint64 = ApicAddress;
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MapAttribute.Bits.Present = 1;
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MapAttribute.Bits.ReadWrite = 1;
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MapMask.Uint64 = MAX_UINT64;
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BufferSize = SIZE_4KB;
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Status = PageTableMap (
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(UINTN *)&Cr3,
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Paging4Level,
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Buffer,
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&BufferSize,
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ApicAddress,
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SIZE_4KB,
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&MapAttribute,
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&MapMask,
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NULL
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);
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if (RETURN_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Failed to map APIC MMIO region as unencrypted: %d\n", Status));
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ASSERT (FALSE);
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}
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CpuFlushTlb ();
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}
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