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9792fb0e65
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
89 lines
3.2 KiB
C
89 lines
3.2 KiB
C
/** @file
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Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/MemoryAllocationLib.h>
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// Number of Virtual Memory Map Descriptors
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#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5
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//
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// mach-virt's core peripherals such as the UART, the GIC and the RTC are
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// all mapped in the 'miscellaneous device I/O' region, which we just map
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// in its entirety rather than device by device. Note that it does not
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// cover any of the NOR flash banks or PCI resource windows.
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//
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#define MACH_VIRT_PERIPH_BASE 0x08000000
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#define MACH_VIRT_PERIPH_SIZE SIZE_128MB
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/**
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Return the Virtual Memory Map of your platform
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This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU
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on your platform.
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@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR
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describing a Physical-to-Virtual Memory
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mapping. This array must be ended by a
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zero-filled entry. The allocated memory
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will not be freed.
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**/
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VOID
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ArmVirtGetMemoryMap (
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OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap
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)
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{
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ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
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ASSERT (VirtualMemoryMap != NULL);
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VirtualMemoryTable = AllocatePool (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
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MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
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if (VirtualMemoryTable == NULL) {
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DEBUG ((DEBUG_ERROR, "%a: Error: Failed AllocatePool()\n", __FUNCTION__));
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return;
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}
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// System DRAM
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VirtualMemoryTable[0].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
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VirtualMemoryTable[0].VirtualBase = VirtualMemoryTable[0].PhysicalBase;
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VirtualMemoryTable[0].Length = PcdGet64 (PcdSystemMemorySize);
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VirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
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DEBUG ((DEBUG_INFO, "%a: Dumping System DRAM Memory Map:\n"
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"\tPhysicalBase: 0x%lX\n"
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"\tVirtualBase: 0x%lX\n"
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"\tLength: 0x%lX\n",
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__FUNCTION__,
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VirtualMemoryTable[0].PhysicalBase,
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VirtualMemoryTable[0].VirtualBase,
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VirtualMemoryTable[0].Length));
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// Memory mapped peripherals (UART, RTC, GIC, virtio-mmio, etc)
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VirtualMemoryTable[1].PhysicalBase = MACH_VIRT_PERIPH_BASE;
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VirtualMemoryTable[1].VirtualBase = MACH_VIRT_PERIPH_BASE;
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VirtualMemoryTable[1].Length = MACH_VIRT_PERIPH_SIZE;
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VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
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// Map the FV region as normal executable memory
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VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFvBaseAddress);
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VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase;
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VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFvSize);
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VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
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// End of Table
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ZeroMem (&VirtualMemoryTable[3], sizeof (ARM_MEMORY_REGION_DESCRIPTOR));
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*VirtualMemoryMap = VirtualMemoryTable;
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}
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