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9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
60 lines
2.0 KiB
NASM
60 lines
2.0 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; EnablePaging64.Asm
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;
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; Abstract:
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;
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; AsmEnablePaging64 function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; InternalX86EnablePaging64 (
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; IN UINT16 Cs,
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; IN UINT64 EntryPoint,
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; IN UINT64 Context1, OPTIONAL
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; IN UINT64 Context2, OPTIONAL
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; IN UINT64 NewStack
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalX86EnablePaging64)
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ASM_PFX(InternalX86EnablePaging64):
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cli
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mov DWORD [esp], .0 ; offset for far retf, seg is the 1st arg
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mov eax, cr4
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or al, (1 << 5)
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mov cr4, eax ; enable PAE
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mov ecx, 0xc0000080
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rdmsr
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or ah, 1 ; set LME
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wrmsr
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mov eax, cr0
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bts eax, 31 ; set PG
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mov cr0, eax ; enable paging
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retf ; topmost 2 dwords hold the address
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.0:
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DB 0x67, 0x48 ; 32-bit address size, 64-bit operand size
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mov ebx, [esp] ; mov rbx, [esp]
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DB 0x67, 0x48
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mov ecx, [esp + 8] ; mov rcx, [esp + 8]
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DB 0x67, 0x48
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mov edx, [esp + 0x10] ; mov rdx, [esp + 10h]
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DB 0x67, 0x48
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mov esp, [esp + 0x18] ; mov rsp, [esp + 18h]
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DB 0x48
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add esp, -0x20 ; add rsp, -20h
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call ebx ; call rbx
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hlt ; no one should get here
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