Michael Kubacki edd46cd407 UefiCpuPkg/SmmCpuFeaturesLib: Add Standalone MM support
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3218

Adds an INF for StandaloneMmCpuFeaturesLib, which supports building
the SmmCpuFeaturesLib code for Standalone MM. Minimal code changes
are made to allow reuse of existing code for Standalone MM.

The original INF file names are left intact (continue to use SMM
terminology) to retain backward compatibility with platforms that
use those INFs. Similarly, the pre-existing C file names are
unchanged to be consistent with the INF file names.

Note that all references in library source files to PiSmm.h have
been changed to PiMm.h for consistency.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Message-Id: <20210217213227.1277-6-mikuback@linux.microsoft.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2021-03-08 18:07:32 +00:00

78 lines
2.0 KiB
C

/** @file
SMM STM support functions
Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <PiMm.h>
#include <Library/DebugLib.h>
#include "SmmStm.h"
///
/// Page Table Entry
///
#define IA32_PG_P BIT0
#define IA32_PG_RW BIT1
#define IA32_PG_PS BIT7
/**
Create 4G page table for STM.
4M Non-PAE page table in IA32 version.
@param PageTableBase The page table base in MSEG
**/
VOID
StmGen4GPageTable (
IN UINTN PageTableBase
)
{
UINTN Index;
UINT32 *Pte;
UINT32 Address;
Pte = (UINT32*)(UINTN)PageTableBase;
Address = 0;
for (Index = 0; Index < SIZE_4KB / sizeof (*Pte); Index++) {
*Pte = Address | IA32_PG_PS | IA32_PG_RW | IA32_PG_P;
Pte++;
Address += SIZE_4MB;
}
}
/**
This is SMM exception handle.
Consumed by STM when exception happen.
@param Context STM protection exception stack frame
@return the EBX value for STM reference.
EBX = 0: resume SMM guest using register state found on exception stack.
EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the
TXT.ERRORCODE register and subsequently reset the system via
TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as
follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC
EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.
**/
UINT32
EFIAPI
SmmStmExceptionHandler (
IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context
)
{
// TBD - SmmStmExceptionHandler, record information
DEBUG ((DEBUG_ERROR, "SmmStmExceptionHandler ...\n"));
//
// Skip this instruction and continue;
//
Context.Ia32StackFrame->Rip += Context.Ia32StackFrame->VmcsExitInstructionLength;
return 0;
}