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0acd869796
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
66 lines
1.5 KiB
NASM
66 lines
1.5 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; First code executed by processor after resetting.
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;
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; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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BITS 16
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ALIGN 16
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;
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; Pad the image size to 4k when page tables are in VTF0
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;
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; If the VTF0 image has page tables built in, then we need to make
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; sure the end of VTF0 is 4k above where the page tables end.
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;
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; This is required so the page tables will be 4k aligned when VTF0 is
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; located just below 0x100000000 (4GB) in the firmware device.
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;
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%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
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TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
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%endif
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applicationProcessorEntryPoint:
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;
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; Application Processors entry point
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;
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; GenFv generates code aligned on a 4k boundary which will jump to this
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; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
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; used to wake up the application processors.
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;
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jmp EarlyApInitReal16
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ALIGN 8
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DD 0
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;
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; The VTF signature
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;
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; VTF-0 means that the VTF (Volume Top File) code does not require
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; any fixups.
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;
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vtfSignature:
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DB 'V', 'T', 'F', 0
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ALIGN 16
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resetVector:
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;
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; Reset Vector
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;
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; This is where the processor will begin execution
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;
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nop
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nop
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jmp EarlyBspInitReal16
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ALIGN 16
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fourGigabytes:
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