mirror of https://github.com/acidanthera/audk.git
337 lines
11 KiB
C
337 lines
11 KiB
C
/** @file
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This file contains URB request, each request is warpped in a
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URB (Usb Request Block).
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Copyright (c) 2007 - 2010, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _EFI_EHCI_URB_H_
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#define _EFI_EHCI_URB_H_
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typedef struct _EHC_QTD EHC_QTD;
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typedef struct _EHC_QH EHC_QH;
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typedef struct _URB URB;
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//
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// Transfer types, used in URB to identify the transfer type
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//
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#define EHC_CTRL_TRANSFER 0x01
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#define EHC_BULK_TRANSFER 0x02
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#define EHC_INT_TRANSFER_SYNC 0x04
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#define EHC_INT_TRANSFER_ASYNC 0x08
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#define EHC_QTD_SIG SIGNATURE_32 ('U', 'S', 'B', 'T')
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#define EHC_QH_SIG SIGNATURE_32 ('U', 'S', 'B', 'H')
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#define EHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
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//
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// Hardware related bit definitions
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//
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#define EHC_TYPE_ITD 0x00
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#define EHC_TYPE_QH 0x02
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#define EHC_TYPE_SITD 0x04
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#define EHC_TYPE_FSTN 0x06
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#define QH_NAK_RELOAD 3
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#define QH_HSHBW_MULTI 1
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#define QTD_MAX_ERR 3
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#define QTD_PID_OUTPUT 0x00
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#define QTD_PID_INPUT 0x01
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#define QTD_PID_SETUP 0x02
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#define QTD_STAT_DO_OUT 0
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#define QTD_STAT_DO_SS 0
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#define QTD_STAT_DO_PING 0x01
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#define QTD_STAT_DO_CS 0x02
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#define QTD_STAT_TRANS_ERR 0x08
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#define QTD_STAT_BABBLE_ERR 0x10
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#define QTD_STAT_BUFF_ERR 0x20
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#define QTD_STAT_HALTED 0x40
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#define QTD_STAT_ACTIVE 0x80
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#define QTD_STAT_ERR_MASK (QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR)
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#define QTD_MAX_BUFFER 4
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#define QTD_BUF_LEN 4096
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#define QTD_BUF_MASK 0x0FFF
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#define QH_MICROFRAME_0 0x01
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#define QH_MICROFRAME_1 0x02
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#define QH_MICROFRAME_2 0x04
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#define QH_MICROFRAME_3 0x08
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#define QH_MICROFRAME_4 0x10
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#define QH_MICROFRAME_5 0x20
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#define QH_MICROFRAME_6 0x40
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#define QH_MICROFRAME_7 0x80
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#define USB_ERR_SHORT_PACKET 0x200
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//
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// Fill in the hardware link point: pass in a EHC_QH/QH_HW
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// pointer to QH_LINK; A EHC_QTD/QTD_HW pointer to QTD_LINK
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//
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#define QH_LINK(Addr, Type, Term) \
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((UINT32) ((EHC_LOW_32BIT (Addr) & 0xFFFFFFE0) | (Type) | ((Term) ? 1 : 0)))
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#define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))
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//
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// The defination of EHCI hardware used data structure for
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// little endian architecture. The QTD and QH structures
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// are required to be 32 bytes aligned. Don't add members
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// to the head of the associated software strucuture.
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//
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#pragma pack(1)
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typedef struct {
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UINT32 NextQtd;
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UINT32 AltNext;
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UINT32 Status : 8;
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UINT32 Pid : 2;
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UINT32 ErrCnt : 2;
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UINT32 CurPage : 3;
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UINT32 Ioc : 1;
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UINT32 TotalBytes : 15;
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UINT32 DataToggle : 1;
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UINT32 Page[5];
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UINT32 PageHigh[5];
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} QTD_HW;
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typedef struct {
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UINT32 HorizonLink;
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//
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// Endpoint capabilities/Characteristics DWord 1 and DWord 2
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//
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UINT32 DeviceAddr : 7;
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UINT32 Inactive : 1;
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UINT32 EpNum : 4;
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UINT32 EpSpeed : 2;
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UINT32 DtCtrl : 1;
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UINT32 ReclaimHead : 1;
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UINT32 MaxPacketLen : 11;
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UINT32 CtrlEp : 1;
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UINT32 NakReload : 4;
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UINT32 SMask : 8;
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UINT32 CMask : 8;
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UINT32 HubAddr : 7;
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UINT32 PortNum : 7;
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UINT32 Multiplier : 2;
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//
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// Transaction execution overlay area
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//
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UINT32 CurQtd;
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UINT32 NextQtd;
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UINT32 AltQtd;
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UINT32 Status : 8;
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UINT32 Pid : 2;
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UINT32 ErrCnt : 2;
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UINT32 CurPage : 3;
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UINT32 Ioc : 1;
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UINT32 TotalBytes : 15;
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UINT32 DataToggle : 1;
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UINT32 Page[5];
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UINT32 PageHigh[5];
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} QH_HW;
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#pragma pack()
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//
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// Endpoint address and its capabilities
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//
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typedef struct _USB_ENDPOINT {
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UINT8 DevAddr;
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UINT8 EpAddr; // Endpoint address, no direction encoded in
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EFI_USB_DATA_DIRECTION Direction;
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UINT8 DevSpeed;
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UINTN MaxPacket;
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UINT8 HubAddr;
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UINT8 HubPort;
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UINT8 Toggle; // Data toggle, not used for control transfer
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UINTN Type;
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UINTN PollRate; // Polling interval used by EHCI
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} USB_ENDPOINT;
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//
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// Software QTD strcture, this is used to manage all the
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// QTD generated from a URB. Don't add fields before QtdHw.
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//
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struct _EHC_QTD {
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QTD_HW QtdHw;
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UINT32 Signature;
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LIST_ENTRY QtdList; // The list of QTDs to one end point
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UINT8 *Data; // Buffer of the original data
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UINTN DataLen; // Original amount of data in this QTD
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};
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//
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// Software QH structure. All three different transaction types
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// supported by UEFI USB, that is the control/bulk/interrupt
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// transfers use the queue head and queue token strcuture.
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//
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// Interrupt QHs are linked to periodic frame list in the reversed
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// 2^N tree. Each interrupt QH is linked to the list starting at
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// frame 0. There is a dummy interrupt QH linked to each frame as
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// a sentinental whose polling interval is 1. Synchronous interrupt
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// transfer is linked after this dummy QH.
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//
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// For control/bulk transfer, only synchronous (in the sense of UEFI)
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// transfer is supported. A dummy QH is linked to EHCI AsyncListAddr
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// as the reclamation header. New transfer is inserted after this QH.
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//
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struct _EHC_QH {
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QH_HW QhHw;
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UINT32 Signature;
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EHC_QH *NextQh; // The queue head pointed to by horizontal link
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LIST_ENTRY Qtds; // The list of QTDs to this queue head
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UINTN Interval;
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};
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//
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// URB (Usb Request Block) contains information for all kinds of
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// usb requests.
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//
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struct _URB {
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UINT32 Signature;
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LIST_ENTRY UrbList;
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//
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// Transaction information
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//
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USB_ENDPOINT Ep;
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EFI_USB_DEVICE_REQUEST *Request; // Control transfer only
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VOID *RequestPhy; // Address of the mapped request
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VOID *RequestMap;
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VOID *Data;
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UINTN DataLen;
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VOID *DataPhy; // Address of the mapped user data
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VOID *DataMap;
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EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;
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VOID *Context;
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//
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// Schedule data
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//
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EHC_QH *Qh;
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//
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// Transaction result
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//
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UINT32 Result;
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UINTN Completed; // completed data length
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UINT8 DataToggle;
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};
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/**
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Create a single QTD to hold the data.
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@param Ehc The EHCI device.
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@param Data The cpu memory address of current data not associated with a QTD.
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@param DataPhy The pci bus address of current data not associated with a QTD.
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@param DataLen The length of the data.
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@param PktId Packet ID to use in the QTD.
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@param Toggle Data toggle to use in the QTD.
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@param MaxPacket Maximu packet length of the endpoint.
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@return Created QTD or NULL if failed to create one.
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**/
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EHC_QTD *
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EhcCreateQtd (
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IN USB2_HC_DEV *Ehc,
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IN UINT8 *Data,
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IN UINT8 *DataPhy,
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IN UINTN DataLen,
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IN UINT8 PktId,
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IN UINT8 Toggle,
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IN UINTN MaxPacket
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);
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/**
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Allocate and initialize a EHCI queue head.
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@param Ehci The EHCI device.
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@param Ep The endpoint to create queue head for.
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@return Created queue head or NULL if failed to create one.
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**/
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EHC_QH *
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EhcCreateQh (
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IN USB2_HC_DEV *Ehci,
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IN USB_ENDPOINT *Ep
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);
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/**
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Free an allocated URB. It is possible for it to be partially inited.
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@param Ehc The EHCI device.
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@param Urb The URB to free.
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**/
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VOID
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EhcFreeUrb (
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IN USB2_HC_DEV *Ehc,
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IN URB *Urb
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);
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/**
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Create a new URB and its associated QTD.
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@param Ehc The EHCI device.
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@param DevAddr The device address.
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@param EpAddr Endpoint addrress & its direction.
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@param DevSpeed The device speed.
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@param Toggle Initial data toggle to use.
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@param MaxPacket The max packet length of the endpoint.
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@param Hub The transaction translator to use.
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@param Type The transaction type.
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@param Request The standard USB request for control transfer.
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@param Data The user data to transfer.
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@param DataLen The length of data buffer.
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@param Callback The function to call when data is transferred.
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@param Context The context to the callback.
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@param Interval The interval for interrupt transfer.
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@return Created URB or NULL.
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**/
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URB *
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EhcCreateUrb (
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IN USB2_HC_DEV *Ehc,
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IN UINT8 DevAddr,
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IN UINT8 EpAddr,
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IN UINT8 DevSpeed,
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IN UINT8 Toggle,
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IN UINTN MaxPacket,
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IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,
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IN UINTN Type,
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IN EFI_USB_DEVICE_REQUEST *Request,
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IN VOID *Data,
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IN UINTN DataLen,
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IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,
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IN VOID *Context,
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IN UINTN Interval
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);
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#endif
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