audk/QuarkSocPkg
Michael Kinney 4be1fbc287 QuarkSocPkg/SmmCpuFeaturesLib: Add SMRR PhysBase/PhysMask fields check
SMRR range size and alignment should follow the rules like MTRR:
a. The minimum range size is 4 KBytes and the base address of the
   range must be on at least a 4-KByte boundary.
b. For ranges greater than 4 KBytes, each range must be of length
   2^n and its base address must be aligned on a 2^n boundary, where
   n is a value equal to or greater than 12. The base-address
   alignment value cannot be less than its length.
Thus, it could meet "Address_Within_Range AND PhysMask = PhysBase
AND PhysMask".

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2016-05-19 10:04:34 -07:00
..
QuarkNorthCluster QuarkSocPkg/SmmCpuFeaturesLib: Add SMRR PhysBase/PhysMask fields check 2016-05-19 10:04:34 -07:00
QuarkSouthCluster QuarkSocPkg/SDControllerDxe: Add EFIAPI to SetHighSpeedMode 2016-05-13 11:34:41 -07:00
Contributions.txt QuarkSocPkg: Add new package for Quark SoC X1000 2015-12-15 19:22:23 +00:00
License.txt QuarkSocPkg: Add new package for Quark SoC X1000 2015-12-15 19:22:23 +00:00
QuarkSocPkg.dec QuarkSocPkg: Add new package for Quark SoC X1000 2015-12-15 19:22:23 +00:00
QuarkSocPkg.dsc QuarkSocPkg: Remove X64 from SUPPORTED_ARCHITECTURES 2016-01-07 21:52:53 +00:00