mirror of https://github.com/acidanthera/audk.git
89 lines
4.4 KiB
C
89 lines
4.4 KiB
C
/** @file
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* Header defining Versatile Express constants (Base addresses, sizes, flags)
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __VEXPRESSMOTHERBOARD_H_
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#define __VEXPRESSMOTHERBOARD_H_
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#include <ArmPlatform.h>
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/***********************************************************************************
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// Motherboard memory-mapped peripherals
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************************************************************************************/
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// Define MotherBoard SYS flags offsets (from ARM_VE_BOARD_PERIPH_BASE)
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#define ARM_VE_SYS_ID_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00000)
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#define ARM_VE_SYS_LED_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00008)
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#define ARM_VE_SYS_FLAGS_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
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#define ARM_VE_SYS_FLAGS_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00030)
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#define ARM_VE_SYS_FLAGS_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00034)
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#define ARM_VE_SYS_FLAGS_NV_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
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#define ARM_VE_SYS_FLAGS_NV_SET_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00038)
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#define ARM_VE_SYS_FLAGS_NV_CLR_REG (ARM_VE_BOARD_PERIPH_BASE + 0x0003C)
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#define ARM_VE_SYS_FLASH (ARM_VE_BOARD_PERIPH_BASE + 0x0004C)
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#define ARM_VE_SYS_PROCID0_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00084)
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#define ARM_VE_SYS_PROCID1_REG (ARM_VE_BOARD_PERIPH_BASE + 0x00088)
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#define ARM_VE_SYS_CFGDATA_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A0)
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#define ARM_VE_SYS_CFGCTRL_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A4)
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#define ARM_VE_SYS_CFGSTAT_REG (ARM_VE_BOARD_PERIPH_BASE + 0x000A8)
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// SP810 Controller
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#define SP810_CTRL_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x01000)
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// PL111 Colour LCD Controller - motherboard
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#define PL111_CLCD_MOTHERBOARD_BASE (ARM_VE_BOARD_PERIPH_BASE + 0x1F000)
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#define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1
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// VRAM offset for the PL111 Colour LCD Controller on the motherboard
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#define VRAM_MOTHERBOARD_BASE (ARM_VE_SMB_PERIPH_BASE + 0x00000)
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#define ARM_VE_SYS_PROC_ID_MASK (0xFF << 24)
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#define ARM_VE_SYS_PROC_ID_UNSUPPORTED (0xFF << 24)
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#define ARM_VE_SYS_PROC_ID_CORTEX_A9 (0x0C << 24)
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#define ARM_VE_SYS_PROC_ID_CORTEX_A5 (0x12 << 24)
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#define ARM_VE_SYS_PROC_ID_CORTEX_A15 (0x14 << 24)
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//
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// Sites where the peripheral is fitted
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//
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#define ARM_VE_UNSUPPORTED ~0
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#define ARM_VE_MOTHERBOARD_SITE 0
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#define ARM_VE_DAUGHTERBOARD_1_SITE 1
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#define ARM_VE_DAUGHTERBOARD_2_SITE 2
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#define VIRTUAL_SYS_CFG(site,func) (((site) << 24) | (func))
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//
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// System Configuration Control Functions
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//
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#define SYS_CFG_OSC 1
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#define SYS_CFG_VOLT 2
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#define SYS_CFG_AMP 3
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#define SYS_CFG_TEMP 4
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#define SYS_CFG_RESET 5
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#define SYS_CFG_SCC 6
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#define SYS_CFG_MUXFPGA 7
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#define SYS_CFG_SHUTDOWN 8
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#define SYS_CFG_REBOOT 9
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#define SYS_CFG_DVIMODE 11
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#define SYS_CFG_POWER 12
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// Oscillator for Site 1
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#define SYS_CFG_OSC_SITE1 VIRTUAL_SYS_CFG(ARM_VE_DAUGHTERBOARD_1_SITE,SYS_CFG_OSC)
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// Oscillator for Site 2
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#define SYS_CFG_OSC_SITE2 VIRTUAL_SYS_CFG(ARM_VE_DAUGHTERBOARD_2_SITE,SYS_CFG_OSC)
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// Can not access the battery backed-up hardware clock on the Versatile Express motherboard
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#define SYS_CFG_RTC VIRTUAL_SYS_CFG(ARM_VE_UNSUPPORTED,1)
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#endif /* VEXPRESSMOTHERBOARD_H_ */
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