mirror of https://github.com/acidanthera/audk.git
362 lines
9.8 KiB
C
362 lines
9.8 KiB
C
/** @file
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Serial I/O Port library functions with no library constructor/destructor
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Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Drivers/PL011Uart.h>
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/*
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Initialise the serial port to the specified settings.
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All unspecified settings will be set to the default values.
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@return Always return EFI_SUCCESS or EFI_INVALID_PARAMETER.
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**/
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RETURN_STATUS
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EFIAPI
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PL011UartInitializePort (
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IN UINTN UartBase,
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IN UINT64 BaudRate,
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IN UINT32 ReceiveFifoDepth,
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IN UINT32 Timeout,
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IN EFI_PARITY_TYPE Parity,
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IN UINT8 DataBits,
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IN EFI_STOP_BITS_TYPE StopBits
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)
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{
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UINT32 LineControl;
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UINT32 Divisor;
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// The BaudRate must be passed
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if (BaudRate == 0) {
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return RETURN_INVALID_PARAMETER;
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}
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LineControl = 0;
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// The PL011 supports a buffer of either 1 or 32 chars. Therefore we can accept
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// 1 char buffer as the minimum fifo size. Because everything can be rounded down,
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// there is no maximum fifo size.
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if (ReceiveFifoDepth == 0) {
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LineControl |= PL011_UARTLCR_H_FEN;
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} else if (ReceiveFifoDepth < 32) {
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// Nothing else to do. 1 byte fifo is default.
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} else if (ReceiveFifoDepth >= 32) {
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LineControl |= PL011_UARTLCR_H_FEN;
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}
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//
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// Parity
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//
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switch (Parity) {
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case DefaultParity:
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case NoParity:
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// Nothing to do. Parity is disabled by default.
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break;
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case EvenParity:
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LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_EPS);
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break;
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case OddParity:
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LineControl |= PL011_UARTLCR_H_PEN;
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break;
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case MarkParity:
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LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS | PL011_UARTLCR_H_EPS);
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break;
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case SpaceParity:
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LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);
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break;
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default:
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return RETURN_INVALID_PARAMETER;
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}
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//
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// Data Bits
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//
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switch (DataBits) {
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case 0:
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case 8:
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LineControl |= PL011_UARTLCR_H_WLEN_8;
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break;
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case 7:
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LineControl |= PL011_UARTLCR_H_WLEN_7;
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break;
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case 6:
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LineControl |= PL011_UARTLCR_H_WLEN_6;
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break;
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case 5:
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LineControl |= PL011_UARTLCR_H_WLEN_5;
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break;
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default:
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return RETURN_INVALID_PARAMETER;
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}
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//
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// Stop Bits
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//
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switch (StopBits) {
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case DefaultStopBits:
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case OneStopBit:
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// Nothing to do. One stop bit is enabled by default.
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break;
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case TwoStopBits:
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LineControl |= PL011_UARTLCR_H_STP2;
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break;
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case OneFiveStopBits:
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// Only 1 or 2 stops bits are supported
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default:
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return RETURN_INVALID_PARAMETER;
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}
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// Don't send the LineControl value to the PL011 yet,
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// wait until after the Baud Rate setting.
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// This ensures we do not mess up the UART settings halfway through
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// in the rare case when there is an error with the Baud Rate.
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//
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// Baud Rate
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//
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if (PcdGet32(PL011UartInteger) != 0) {
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// Integer and Factional part must be different of 0
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ASSERT(PcdGet32(PL011UartFractional) != 0);
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MmioWrite32 (UartBase + UARTIBRD, PcdGet32(PL011UartInteger));
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MmioWrite32 (UartBase + UARTFBRD, PcdGet32(PL011UartFractional));
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} else {
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Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / BaudRate;
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MmioWrite32 (UartBase + UARTIBRD, Divisor >> 6);
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MmioWrite32 (UartBase + UARTFBRD, Divisor & 0x3F);
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}
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// No parity, 1 stop, no fifo, 8 data bits
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MmioWrite32 (UartBase + UARTLCR_H, LineControl);
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// Clear any pending errors
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MmioWrite32 (UartBase + UARTECR, 0);
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// Enable tx, rx, and uart overall
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MmioWrite32 (UartBase + UARTCR, PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);
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return RETURN_SUCCESS;
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}
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/**
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Set the serial device control bits.
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@param UartBase The base address of the PL011 UART.
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@param Control Control bits which are to be set on the serial device.
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@retval EFI_SUCCESS The new control bits were set on the serial device.
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@retval EFI_UNSUPPORTED The serial device does not support this operation.
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@retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
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**/
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RETURN_STATUS
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EFIAPI
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PL011UartSetControl (
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IN UINTN UartBase,
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IN UINT32 Control
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)
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{
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UINT32 Bits;
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UINT32 ValidControlBits;
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ValidControlBits = ( EFI_SERIAL_REQUEST_TO_SEND
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| EFI_SERIAL_DATA_TERMINAL_READY
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// | EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE // Not implemented yet.
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// | EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE // Not implemented yet.
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| EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE
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);
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if (Control & (~ValidControlBits)) {
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return EFI_UNSUPPORTED;
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}
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Bits = MmioRead32 (UartBase + UARTCR);
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if (Control & EFI_SERIAL_REQUEST_TO_SEND) {
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Bits |= PL011_UARTCR_RTS;
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}
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if (Control & EFI_SERIAL_DATA_TERMINAL_READY) {
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Bits |= PL011_UARTCR_DTR;
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}
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if (Control & EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE) {
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Bits |= PL011_UARTCR_LBE;
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}
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if (Control & EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE) {
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Bits |= (PL011_UARTCR_CTSEN & PL011_UARTCR_RTSEN);
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}
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MmioWrite32 (UartBase + UARTCR, Bits);
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return RETURN_SUCCESS;
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}
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/**
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Get the serial device control bits.
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@param UartBase The base address of the PL011 UART.
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@param Control Control signals read from the serial device.
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@retval EFI_SUCCESS The control bits were read from the serial device.
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@retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
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**/
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RETURN_STATUS
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EFIAPI
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PL011UartGetControl (
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IN UINTN UartBase,
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OUT UINT32 *Control
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)
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{
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UINT32 FlagRegister;
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UINT32 ControlRegister;
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FlagRegister = MmioRead32 (UartBase + UARTFR);
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ControlRegister = MmioRead32 (UartBase + UARTCR);
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*Control = 0;
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if ((FlagRegister & PL011_UARTFR_CTS) == PL011_UARTFR_CTS) {
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*Control |= EFI_SERIAL_CLEAR_TO_SEND;
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}
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if ((FlagRegister & PL011_UARTFR_DSR) == PL011_UARTFR_DSR) {
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*Control |= EFI_SERIAL_DATA_SET_READY;
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}
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if ((FlagRegister & PL011_UARTFR_RI) == PL011_UARTFR_RI) {
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*Control |= EFI_SERIAL_RING_INDICATE;
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}
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if ((FlagRegister & PL011_UARTFR_DCD) == PL011_UARTFR_DCD) {
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*Control |= EFI_SERIAL_CARRIER_DETECT;
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}
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if ((ControlRegister & PL011_UARTCR_RTS) == PL011_UARTCR_RTS) {
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*Control |= EFI_SERIAL_REQUEST_TO_SEND;
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}
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if ((ControlRegister & PL011_UARTCR_DTR) == PL011_UARTCR_DTR) {
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*Control |= EFI_SERIAL_DATA_TERMINAL_READY;
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}
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if ((FlagRegister & PL011_UARTFR_RXFE) == PL011_UARTFR_RXFE) {
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*Control |= EFI_SERIAL_INPUT_BUFFER_EMPTY;
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}
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if ((FlagRegister & PL011_UARTFR_TXFE) == PL011_UARTFR_TXFE) {
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*Control |= EFI_SERIAL_OUTPUT_BUFFER_EMPTY;
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}
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if ((ControlRegister & (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) == (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) {
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*Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
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}
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#ifdef NEVER
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// ToDo: Implement EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE
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if ((ControlRegister & PL011_UARTCR_LBE) == PL011_UARTCR_LBE) {
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*Control |= EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE;
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}
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// ToDo: Implement EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE
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if (SoftwareLoopbackEnable) {
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*Control |= EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;
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}
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#endif
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return RETURN_SUCCESS;
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}
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/**
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Write data to serial device.
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@param Buffer Point of data buffer which need to be written.
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@param NumberOfBytes Number of output bytes which are cached in Buffer.
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@retval 0 Write data failed.
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@retval !0 Actual number of bytes written to serial device.
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**/
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UINTN
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EFIAPI
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PL011UartWrite (
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IN UINTN UartBase,
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IN UINT8 *Buffer,
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IN UINTN NumberOfBytes
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)
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{
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UINTN Count;
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for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
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while ((MmioRead32 (UartBase + UARTFR) & UART_TX_EMPTY_FLAG_MASK) == 0);
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MmioWrite8 (UartBase + UARTDR, *Buffer);
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}
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return NumberOfBytes;
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}
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/**
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Read data from serial device and save the data in buffer.
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@param Buffer Point of data buffer which need to be written.
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@param NumberOfBytes Number of output bytes which are cached in Buffer.
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@retval 0 Read data failed.
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@retval !0 Actual number of bytes read from serial device.
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**/
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UINTN
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EFIAPI
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PL011UartRead (
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IN UINTN UartBase,
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OUT UINT8 *Buffer,
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IN UINTN NumberOfBytes
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)
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{
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UINTN Count;
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for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
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while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
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*Buffer = MmioRead8 (UartBase + UARTDR);
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}
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return NumberOfBytes;
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}
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/**
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Check to see if any data is available to be read from the debug device.
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@retval EFI_SUCCESS At least one byte of data is available to be read
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@retval EFI_NOT_READY No data is available to be read
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@retval EFI_DEVICE_ERROR The serial device is not functioning properly
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**/
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BOOLEAN
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EFIAPI
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PL011UartPoll (
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IN UINTN UartBase
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)
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{
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return ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) == 0);
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}
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