mirror of https://github.com/acidanthera/audk.git
134 lines
3.9 KiB
C
134 lines
3.9 KiB
C
/** @file Lcd.c
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Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/LcdPlatformLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Drivers/HdLcd.h>
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#include "LcdGraphicsOutputDxe.h"
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/**********************************************************************
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*
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* This file contains all the bits of the Lcd that are
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* platform independent.
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*
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**********************************************************************/
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EFI_STATUS
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LcdInitialize (
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IN EFI_PHYSICAL_ADDRESS VramBaseAddress
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)
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{
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// Disable the controller
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MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);
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// Disable all interrupts
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MmioWrite32(HDLCD_REG_INT_MASK, 0);
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// Define start of the VRAM. This never changes for any graphics mode
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MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress);
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// Setup various registers that never change
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MmioWrite32(HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);
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MmioWrite32(HDLCD_REG_POLARITIES, HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH);
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MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL);
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MmioWrite32(HDLCD_REG_RED_SELECT, (0 << 16 | 8 << 8 | 0));
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MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));
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MmioWrite32(HDLCD_REG_BLUE_SELECT, (0 << 16 | 8 << 8 | 16));
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return EFI_SUCCESS;
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}
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EFI_STATUS
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LcdSetMode (
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IN UINT32 ModeNumber
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)
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{
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EFI_STATUS Status;
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UINT32 HRes;
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UINT32 HSync;
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UINT32 HBackPorch;
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UINT32 HFrontPorch;
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UINT32 VRes;
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UINT32 VSync;
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UINT32 VBackPorch;
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UINT32 VFrontPorch;
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UINT32 BytesPerPixel;
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LCD_BPP LcdBpp;
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// Set the video mode timings and other relevant information
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Status = LcdPlatformGetTimings (ModeNumber,
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&HRes,&HSync,&HBackPorch,&HFrontPorch,
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&VRes,&VSync,&VBackPorch,&VFrontPorch);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR( Status )) {
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return EFI_DEVICE_ERROR;
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}
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Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR( Status )) {
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return EFI_DEVICE_ERROR;
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}
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BytesPerPixel = GetBytesPerPixel(LcdBpp);
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// Disable the controller
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MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);
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// Update the frame buffer information with the new settings
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MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);
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MmioWrite32(HDLCD_REG_FB_LINE_PITCH, HRes * BytesPerPixel);
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MmioWrite32(HDLCD_REG_FB_LINE_COUNT, VRes - 1);
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// Set the vertical timing information
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MmioWrite32(HDLCD_REG_V_SYNC, VSync);
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MmioWrite32(HDLCD_REG_V_BACK_PORCH, VBackPorch);
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MmioWrite32(HDLCD_REG_V_DATA, VRes - 1);
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MmioWrite32(HDLCD_REG_V_FRONT_PORCH, VFrontPorch);
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// Set the horizontal timing information
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MmioWrite32(HDLCD_REG_H_SYNC, HSync);
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MmioWrite32(HDLCD_REG_H_BACK_PORCH, HBackPorch);
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MmioWrite32(HDLCD_REG_H_DATA, HRes - 1);
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MmioWrite32(HDLCD_REG_H_FRONT_PORCH, HFrontPorch);
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// Enable the controller
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MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE);
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return EFI_SUCCESS;
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}
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VOID
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LcdShutdown (
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VOID
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)
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{
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// Disable the controller
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MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
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}
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EFI_STATUS
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LcdIdentify (
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VOID
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)
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{
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return EFI_SUCCESS;
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}
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