mirror of https://github.com/acidanthera/audk.git
92 lines
3.6 KiB
C
92 lines
3.6 KiB
C
/** @file
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*
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* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __ARM_JUNO_H__
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#define __ARM_JUNO_H__
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#include <VExpressMotherBoard.h>
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/***********************************************************************************
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// Platform Memory Map
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************************************************************************************/
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// Motherboard Peripheral and On-chip peripheral
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#define ARM_VE_BOARD_PERIPH_BASE 0x1C010000
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// NOR Flash 0
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#define ARM_VE_SMB_NOR0_BASE 0x08000000
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#define ARM_VE_SMB_NOR0_SZ SIZE_64MB
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// Off-Chip peripherals (USB, Ethernet, VRAM)
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#define ARM_VE_SMB_PERIPH_BASE 0x18000000
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#define ARM_VE_SMB_PERIPH_SZ (SIZE_64MB + SIZE_2MB)
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// On-Chip non-secure ROM
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#define ARM_JUNO_NON_SECURE_ROM_BASE 0x1F000000
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#define ARM_JUNO_NON_SECURE_ROM_SZ SIZE_16MB
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// On-Chip Peripherals
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#define ARM_JUNO_PERIPHERALS_BASE 0x20000000
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#define ARM_JUNO_PERIPHERALS_SZ 0x0E000000
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// On-Chip non-secure SRAM
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#define ARM_JUNO_NON_SECURE_SRAM_BASE 0x2E000000
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#define ARM_JUNO_NON_SECURE_SRAM_SZ SIZE_16MB
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// SOC peripherals (HDLCD, UART, I2C, I2S, USB, SMC-PL354, etc)
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#define ARM_JUNO_SOC_PERIPHERALS_BASE 0x7FF50000
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#define ARM_JUNO_SOC_PERIPHERALS_SZ (SIZE_64KB * 9)
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// 6GB of DRAM from the 64bit address space
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#define ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE 0x0880000000
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#define ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ (SIZE_2GB + SIZE_4GB)
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//
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// ACPI table information used to initialize tables.
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//
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#define EFI_ACPI_ARM_OEM_ID 'A','R','M','L','T','D' // OEMID 6 bytes long
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#define EFI_ACPI_ARM_OEM_TABLE_ID SIGNATURE_64('A','R','M','-','J','U','N','O') // OEM table id 8 bytes long
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#define EFI_ACPI_ARM_OEM_REVISION 0x20140727
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#define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ')
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#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099
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// A macro to initialise the common header part of EFI ACPI tables as defined by
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// EFI_ACPI_DESCRIPTION_HEADER structure.
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#define ARM_ACPI_HEADER(Signature, Type, Revision) { \
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Signature, /* UINT32 Signature */ \
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sizeof (Type), /* UINT32 Length */ \
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Revision, /* UINT8 Revision */ \
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0, /* UINT8 Checksum */ \
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{ EFI_ACPI_ARM_OEM_ID }, /* UINT8 OemId[6] */ \
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EFI_ACPI_ARM_OEM_TABLE_ID, /* UINT64 OemTableId */ \
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EFI_ACPI_ARM_OEM_REVISION, /* UINT32 OemRevision */ \
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EFI_ACPI_ARM_CREATOR_ID, /* UINT32 CreatorId */ \
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EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \
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}
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#define JUNO_WATCHDOG_COUNT 2
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// Define if the exported ACPI Tables are based on ACPI 5.0 spec or latest
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//#define ARM_JUNO_ACPI_5_0
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//
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// Address of the system registers that contain the MAC address
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// assigned to the PCI Gigabyte Ethernet device.
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//
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#define ARM_JUNO_SYS_PCIGBE_L (ARM_VE_BOARD_PERIPH_BASE + 0x74)
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#define ARM_JUNO_SYS_PCIGBE_H (ARM_VE_BOARD_PERIPH_BASE + 0x78)
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#endif
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