mirror of https://github.com/acidanthera/audk.git
e5b4d825af
When assigning a physical PCIe device to a QEMU/KVM guest, PciBusDxe may find that the extended config space is not (fully) implemented. In LocatePciExpressCapabilityRegBlock(), "CapabilityEntry" may be read as 0xFFFF_FFFF at a given config space offset, after which the loop gets stuck spinning on offset 0xFFC (the read at offset 0xFFC returns 0xFFFF_FFFF most likely as well). Another scenario (not related to virtualization) for triggering the above is when a Conventional PCI bus -- exposed by a PCIe-to-PCI bridge in the topology -- intervenes between a PCI Express Root Port and a PCI Express Endpoint. The Conventional PCI bus limits the accessible config space of the PCI Express Endpoint, even though the endpoint advertizes the PCI Express capability. Here's a diagram, courtesy of Alex Williamson: [PCIe Root Port]--[PCIe-to-PCI]--[PCI-to-PCIe]--[PCIe EP] ->| |<- Conventional PCI bus Catch reads of 0xFFFF_FFFF in LocatePciExpressCapabilityRegBlock(), and break out of the scan with a warning message. The function will return EFI_NOT_FOUND. Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> |
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Ata | ||
I2c/I2cDxe | ||
Isa | ||
Pci | ||
Scsi | ||
Sd | ||
Ufs | ||
Usb |