mirror of https://github.com/acidanthera/audk.git
4fe2678411
RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 PeilessStarupLib provides a function (PeilessStartup) which brings up both Legacy and Tdx guest from SEC phase to DXE phase. PEI phase is skipped so that the attack surfaces are reduced as much as possible. PeilessStartup() does below tasks: 1. Contruct the FW hoblist. Since PEI is skipped, we must find a memory region which is the largest one below 4GB. Then this memory region will be used as the firmware hoblist. 2. Initialize the platform. 3. Build various Hobs, such as SecFv Hob, DxeFv Hob, Stack Hob, etc. 4. At last DXE Core is located / loaded and transfer control to it. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com> |
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| .. | ||
| BhyveFwCtlLib.h | ||
| BlobVerifierLib.h | ||
| LoadLinuxLib.h | ||
| MemEncryptSevLib.h | ||
| MemEncryptTdxLib.h | ||
| NvVarsFileLib.h | ||
| PciCapLib.h | ||
| PciCapPciIoLib.h | ||
| PciCapPciSegmentLib.h | ||
| PciHostBridgeUtilityLib.h | ||
| PeilessStartupLib.h | ||
| PlatformBmPrintScLib.h | ||
| PlatformFvbLib.h | ||
| PlatformInitLib.h | ||
| QemuBootOrderLib.h | ||
| QemuFwCfgLib.h | ||
| QemuFwCfgS3Lib.h | ||
| QemuFwCfgSimpleParserLib.h | ||
| QemuLoadImageLib.h | ||
| SerializeVariablesLib.h | ||
| TdxMailboxLib.h | ||
| VirtioLib.h | ||
| VirtioMmioDeviceLib.h | ||
| XenHypercallLib.h | ||
| XenIoMmioLib.h | ||
| XenPlatformLib.h | ||