mirror of https://github.com/acidanthera/audk.git
1140 lines
41 KiB
ArmAsm
1140 lines
41 KiB
ArmAsm
#------------------------------------------------------------------------------
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#*
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#* Copyright 2006 - 2007, Intel Corporation
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#* All rights reserved. This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* st16_64.asm
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#*
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#* Abstract:
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#*
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#------------------------------------------------------------------------------
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.stack:
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.486p:
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.code16
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.equ FAT_DIRECTORY_ENTRY_SIZE, 0x020
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.equ FAT_DIRECTORY_ENTRY_SHIFT, 5
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.equ BLOCK_SIZE, 0x0200
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.equ BLOCK_MASK, 0x01ff
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.equ BLOCK_SHIFT, 9
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.org 0x0
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Ia32Jump:
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jmp BootSectorEntryPoint # JMP inst - 3 bytes
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nop
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OemId: .ascii "INTEL " # OemId - 8 bytes
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SectorSize: .word 0 # Sector Size - 16 bits
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SectorsPerCluster: .byte 0 # Sector Per Cluster - 8 bits
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ReservedSectors: .word 0 # Reserved Sectors - 16 bits
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NoFats: .byte 0 # Number of FATs - 8 bits
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RootEntries: .word 0 # Root Entries - 16 bits
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Sectors: .word 0 # Number of Sectors - 16 bits
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Media: .byte 0 # Media - 8 bits - ignored
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SectorsPerFat: .word 0 # Sectors Per FAT - 16 bits
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SectorsPerTrack: .word 0 # Sectors Per Track - 16 bits - ignored
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Heads: .word 0 # Heads - 16 bits - ignored
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HiddenSectors: .long 0 # Hidden Sectors - 32 bits - ignored
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LargeSectors: .long 0 # Large Sectors - 32 bits
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PhysicalDrive: .byte 0 # PhysicalDriveNumber - 8 bits - ignored
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CurrentHead: .byte 0 # Current Head - 8 bits
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Signature: .byte 0 # Signature - 8 bits - ignored
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VolId: .ascii " " # Volume Serial Number- 4 bytes
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FatLabel: .ascii " " # Label - 11 bytes
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SystemId: .ascii "FAT16 " # SystemId - 8 bytes
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BootSectorEntryPoint:
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# ASSUME ds:@code
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# ASSUME ss:@code
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# ds = 1000, es = 2000 + x (size of first cluster >> 4)
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# cx = Start Cluster of EfiLdr
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# dx = Start Cluster of Efivar.bin
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# Re use the BPB data stored in Boot Sector
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movw $0x7c00,%bp
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pushw %cx
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# Read Efivar.bin
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# 1000:dx = DirectoryEntry of Efivar.bin -> BS.com has filled already
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movw $0x1900,%ax
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movw %ax,%es
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testw %dx,%dx
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jnz CheckVarStoreSize
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movb $1,%al
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NoVarStore:
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pushw %es
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# Set the 5th byte start @ 0:19000 to non-zero indicating we should init var store header in DxeIpl
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movb %al, %es:(4)
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jmp SaveVolumeId
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CheckVarStoreSize:
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movw %dx,%di
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cmpl $0x4000, %ds:2(%di)
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movb $2,%al
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jne NoVarStore
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LoadVarStore:
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movb $0,%al
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movb %al, %es:(4)
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movw (%di), %cx
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# ES:DI = 1500:0
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xorw %di,%di
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pushw %es
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movw $0x1500,%ax
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movw %ax,%es
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call ReadFile
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SaveVolumeId:
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popw %es
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movw VolId(%bp), %ax
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movw %ax, %es:(0) # Save Volume Id to 0:19000. we will find the correct volume according to this VolumeId
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movw VolId+2(%bp), %ax
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movw %ax, %es:(2)
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# Read Efildr
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popw %cx
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# cx = Start Cluster of Efildr -> BS.com has filled already
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# ES:DI = 2000:0, first cluster will be read again
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xorw %di,%di # di = 0
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movw $0x2000,%ax
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movw %ax,%es
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call ReadFile
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movw %cs,%ax
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movw %ax, %cs:JumpSegment
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CheckEm64T:
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movl $0x80000001,%eax
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# cpuid
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.word 0xA20F
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btl $29,%edx
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jc CheckEm64TPass
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pushw %cs
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popw %ds
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leaw Em64String,%si
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movw $18,%cx
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jmp PrintStringAndHalt
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CheckEm64TPass:
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jumpFarInstruction:
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.byte 0xea
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jumpOffset:
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.word 0x200
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jumpSegment:
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.word 0x2000
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# ****************************************************************************
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# ReadFile
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#
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# Arguments:
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# CX = Start Cluster of File
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# ES:DI = Buffer to store file content read from disk
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#
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# Return:
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# (ES << 4 + DI) = end of file content Buffer
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#
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# ****************************************************************************
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ReadFile:
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# si = NumberOfClusters
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# cx = ClusterNumber
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# dx = CachedFatSectorNumber
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# ds:0000 = CacheFatSectorBuffer
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# es:di = Buffer to load file
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# bx = NextClusterNumber
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pusha
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movw $1,%si # NumberOfClusters = 1
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pushw %cx # Push Start Cluster onto stack
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movw $0xfff,%dx # CachedFatSectorNumber = 0xfff
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FatChainLoop:
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movw %cx,%ax # ax = ClusterNumber
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andw $0xfff8,%ax # ax = ax & 0xfff8
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cmpw $0xfff8,%ax # See if this is the last cluster
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je FoundLastCluster # Jump if last cluster found
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movw %cx,%ax # ax = ClusterNumber
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shlw %ax # FatOffset = ClusterNumber * 2
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pushw %si # Save si
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movw %ax,%si # si = FatOffset
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shrw $BLOCK_SHIFT, %ax # ax = FatOffset >> BLOCK_SHIFT
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addw ReservedSectors(%bp), %ax # ax = FatSectorNumber = ReservedSectors + (FatOffset >> BLOCK_OFFSET)
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andw $BLOCK_MASK, %si # si = FatOffset & BLOCK_MASK
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cmpw %dx,%ax # Compare FatSectorNumber to CachedFatSectorNumber
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je SkipFatRead
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movw $2,%bx
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pushw %es
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pushw %ds
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popw %es
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call ReadBlocks # Read 2 blocks starting at AX storing at ES:DI
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popw %es
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movw %ax,%dx # CachedFatSectorNumber = FatSectorNumber
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SkipFatRead:
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movw (%si), %bx # bx = NextClusterNumber
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movw %cx,%ax # ax = ClusterNumber
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popw %si # Restore si
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decw %bx # bx = NextClusterNumber - 1
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cmpw %cx,%bx # See if (NextClusterNumber-1)==ClusterNumber
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jne ReadClusters
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incw %bx # bx = NextClusterNumber
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incw %si # NumberOfClusters++
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movw %bx,%cx # ClusterNumber = NextClusterNumber
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jmp FatChainLoop
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ReadClusters:
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incw %bx
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popw %ax # ax = StartCluster
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pushw %bx # StartCluster = NextClusterNumber
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movw %bx,%cx # ClusterNumber = NextClusterNumber
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subw $2,%ax # ax = StartCluster - 2
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xorb %bh,%bh
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movb SectorsPerCluster(%bp), %bl # bx = SectorsPerCluster
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mulw %bx # ax = (StartCluster - 2) * SectorsPerCluster
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addw (%bp), %ax # ax = FirstClusterLBA + (StartCluster-2)*SectorsPerCluster
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pushw %ax # save start sector
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movw %si,%ax # ax = NumberOfClusters
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mulw %bx # ax = NumberOfClusters * SectorsPerCluster
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movw %ax,%bx # bx = Number of Sectors
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popw %ax # ax = Start Sector
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call ReadBlocks
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movw $1,%si # NumberOfClusters = 1
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jmp FatChainLoop
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FoundLastCluster:
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popw %cx
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popa
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ret
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# ****************************************************************************
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# ReadBlocks - Reads a set of blocks from a block device
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#
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# AX = Start LBA
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# BX = Number of Blocks to Read
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# ES:DI = Buffer to store sectors read from disk
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# ****************************************************************************
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# cx = Blocks
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# bx = NumberOfBlocks
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# si = StartLBA
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ReadBlocks:
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pusha
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addl LBAOffsetForBootSector(%bp), %eax # Add LBAOffsetForBootSector to Start LBA
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addl HiddenSectors(%bp), %eax # Add HiddenSectors to Start LBA
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movl %eax,%esi # esi = Start LBA
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movw %bx,%cx # cx = Number of blocks to read
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ReadCylinderLoop:
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movw $0x7bfc,%bp # bp = 0x7bfc
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movl %esi,%eax # eax = Start LBA
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xorl %edx,%edx # edx = 0
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movzwl (%bp), %ebx # bx = MaxSector
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divl %ebx # ax = StartLBA / MaxSector
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incw %dx # dx = (StartLBA % MaxSector) + 1
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movw (%bp), %bx # bx = MaxSector
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subw %dx,%bx # bx = MaxSector - Sector
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incw %bx # bx = MaxSector - Sector + 1
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cmpw %bx,%cx # Compare (Blocks) to (MaxSector - Sector + 1)
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jg LimitTransfer
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movw %cx,%bx # bx = Blocks
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LimitTransfer:
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pushw %ax # save ax
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movw %es,%ax # ax = es
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shrw $(BLOCK_SHIFT-4), %ax # ax = Number of blocks into mem system
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andw $0x7f,%ax # ax = Number of blocks into current seg
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addw %bx,%ax # ax = End Block number of transfer
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cmpw $0x80,%ax # See if it crosses a 64K boundry
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jle NotCrossing64KBoundry # Branch if not crossing 64K boundry
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subw $0x80,%ax # ax = Number of blocks past 64K boundry
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subw %ax,%bx # Decrease transfer size by block overage
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NotCrossing64KBoundry:
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popw %ax # restore ax
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pushw %cx
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movb %dl,%cl # cl = (StartLBA % MaxSector) + 1 = Sector
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xorw %dx,%dx # dx = 0
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divw 2(%bp) # ax = ax / (MaxHead + 1) = Cylinder
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# dx = ax % (MaxHead + 1) = Head
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pushw %bx # Save number of blocks to transfer
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movb %dl,%dh # dh = Head
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movw $0x7c00,%bp # bp = 0x7c00
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movb PhysicalDrive(%bp), %dl # dl = Drive Number
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movb %al,%ch # ch = Cylinder
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movb %bl,%al # al = Blocks
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movb $2,%ah # ah = Function 2
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movw %di,%bx # es:bx = Buffer address
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int $0x13
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jc DiskError
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popw %bx
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popw %cx
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movzwl %bx,%ebx
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addl %ebx,%esi # StartLBA = StartLBA + NumberOfBlocks
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subw %bx,%cx # Blocks = Blocks - NumberOfBlocks
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movw %es,%ax
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shlw $(BLOCK_SHIFT-4), %bx
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addw %bx,%ax
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movw %ax,%es # es:di = es:di + NumberOfBlocks*BLOCK_SIZE
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cmpw $0,%cx
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jne ReadCylinderLoop
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popa
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ret
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DiskError:
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pushw %cs
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popw %ds
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leaw ErrorString,%si
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movw $7,%cx
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jmp PrintStringAndHalt
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PrintStringAndHalt:
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movw $0xb800,%ax
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movw %ax,%es
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movw $160,%di
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rep
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movsw
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Halt:
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jmp Halt
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ErrorString:
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.byte 'S', 0x0c, 'E', 0x0c, 'r', 0x0c, 'r', 0x0c, 'o', 0x0c, 'r', 0x0c, '!',0x0c
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.org 0x01fa
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LBAOffsetForBootSector:
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.long 0x0
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.org 0x01fe
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.word 0xaa55
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#******************************************************************************
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#******************************************************************************
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#******************************************************************************
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.equ DELAY_PORT, 0x0ed # Port to use for 1uS delay
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.equ KBD_CONTROL_PORT, 0x060 # 8042 control port
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.equ KBD_STATUS_PORT, 0x064 # 8042 status port
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.equ WRITE_DATA_PORT_CMD, 0x0d1 # 8042 command to write the data port
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.equ ENABLE_A20_CMD, 0x0df # 8042 command to enable A20
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.org 0x200
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jmp start
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Em64String:
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.byte 'E', 0x0c, 'm', 0x0c, '6', 0x0c, '4', 0x0c, 'T', 0x0c, ' ', 0x0c, 'U', 0x0c, 'n', 0x0c, 's', 0x0c, 'u', 0x0c, 'p', 0x0c, 'p', 0x0c, 'o', 0x0c, 'r', 0x0c, 't', 0x0c, 'e', 0x0c, 'd', 0x0c, '!', 0x0c
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start:
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movw %cs,%ax
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movw %ax,%ds
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movw %ax,%es
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movw %ax,%ss
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movw $MyStack, %sp
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# mov ax,0b800h
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# mov es,ax
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# mov byte ptr es:[160],'a'
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# mov ax,cs
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# mov es,ax
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movl $0,%ebx
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leal MemoryMap, %edi
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MemMapLoop:
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movl $0xe820,%eax
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movl $20,%ecx
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movl $0x534d4150, %edx # SMAP
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int $0x15
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jc MemMapDone
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addl $20,%edi
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cmpl $0,%ebx
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je MemMapDone
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jmp MemMapLoop
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MemMapDone:
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leal MemoryMap, %eax
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subl %eax,%edi # Get the address of the memory map
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movl %edi, MemoryMapSize # Save the size of the memory map
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xorl %ebx,%ebx
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movw %cs,%bx # BX=segment
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shll $4,%ebx # BX="linear" address of segment base
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leal GDT_BASE(%ebx), %eax # EAX=PHYSICAL address of gdt
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movl %eax, (gdtr + 2) # Put address of gdt into the gdtr
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leal IDT_BASE(%ebx), %eax # EAX=PHYSICAL address of idt
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movl %eax, (idtr + 2) # Put address of idt into the idtr
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leal MemoryMapSize(%ebx), %edx # Physical base address of the memory map
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# mov ax,0b800h
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# mov es,ax
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# mov byte ptr es:[162],'b'
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# mov ax,cs
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# mov es,ax
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#
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# Enable A20 Gate
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#
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movw $0x2401,%ax # Enable A20 Gate
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int $0x15
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jnc A20GateEnabled # Jump if it suceeded
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#
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# If INT 15 Function 2401 is not supported, then attempt to Enable A20 manually.
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#
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 # Jump if the 8042 timed out
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outw %ax, $DELAY_PORT # Delay 1 uS
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movb $WRITE_DATA_PORT_CMD, %al # 8042 cmd to write output port
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outb %al, $KBD_STATUS_PORT # Send command to the 8042
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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jnz Timeout8042 # Jump if the 8042 timed out
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movb $ENABLE_A20_CMD, %al # gate address bit 20 on
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outb %al, $KBD_CONTROL_PORT # Send command to thre 8042
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call Empty8042InputBuffer # Empty the Input Buffer on the 8042 controller
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movw $25,%cx # Delay 25 uS for the command to complete on the 8042
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Delay25uS:
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outw %ax, $DELAY_PORT # Delay 1 uS
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loop Delay25uS
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Timeout8042:
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A20GateEnabled:
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#
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# DISABLE INTERRUPTS - Entering Protected Mode
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#
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cli
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# mov ax,0b800h
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# mov es,ax
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# mov byte ptr es:[164],'c'
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# mov ax,cs
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# mov es,ax
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leal OffsetIn32BitProtectedMode, %eax
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addl $0x20000+0x6,%eax
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movl %eax, OffsetIn32BitProtectedMode
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leal OffsetInLongMode, %eax
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addl $0x20000+0x6,%eax
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movl %eax, OffsetInLongMode
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#
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# load GDT
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#
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.byte 0x66
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lgdt gdtr
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#
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# Enable Protect Mode (set CR0.PE=1)
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#
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movl $cr0, %eax # Read CR0.
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orl $0x1,%eax # Set PE=1
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movl %eax, %cr0 # Write CR0.
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.byte 0x66
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.byte 0xea # jmp far 16:32
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OffsetIn32BitProtectedMode:
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.long 0x0000000 # offset $+8 (In32BitProtectedMode)
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.word 0x10 # selector (flat CS)
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In32BitProtectedMode:
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#
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# Entering Long Mode
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#
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.byte 0x66
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movw $8,%ax
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movw %ax,%ds
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movw %ax,%es
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movw %ax,%ss
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#
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# Enable the 64-bit page-translation-table entries by
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# setting CR4.PAE=1 (this is _required_ before activating
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# long mode). Paging is not enabled until after long mode
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# is enabled.
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#
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.byte 0xf
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.byte 0x20
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.byte 0xe0
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# mov eax, cr4
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btsl $5,%eax
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.byte 0xf
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.byte 0x22
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.byte 0xe0
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# mov cr4, eax
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#
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# This is the Trapolean Page Tables that are guarenteed
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# under 4GB.
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#
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# Address Map:
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# 10000 ~ 12000 - efildr (loaded)
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# 20000 ~ 21000 - start64.com
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# 21000 ~ 22000 - efi64.com
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# 22000 ~ 90000 - efildr
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# 90000 ~ 96000 - 4G pagetable (will be reload later)
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#
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.byte 0xb8
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.long 0x90000
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# mov eax, 90000h
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movl %eax, %cr3
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#
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# Enable long mode (set EFER.LME=1).
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#
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.byte 0xb9
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.long 0xc0000080
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# mov ecx, 0c0000080h ; EFER MSR number.
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.byte 0xf
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.byte 0x32
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# rdmsr ; Read EFER.
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.byte 0xf
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.byte 0xba
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.byte 0xe8
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.byte 0x8
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# bts eax, 8 ; Set LME=1.
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.byte 0xf
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.byte 0x30
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# wrmsr ; Write EFER.
|
|
|
|
#
|
|
# Enable paging to activate long mode (set CR0.PG=1)
|
|
#
|
|
movl $cr0, %eax # Read CR0.
|
|
.byte 0xf
|
|
.byte 0xba
|
|
.byte 0xe8
|
|
.byte 0x1f
|
|
# bts eax, 31 ; Set PG=1.
|
|
movl %eax, %cr0 # Write CR0.
|
|
jmp GoToLongMode
|
|
GoToLongMode:
|
|
|
|
.byte 0x67
|
|
.byte 0xea # Far Jump $+9:Selector to reload CS
|
|
OffsetInLongMode:
|
|
.long 00000000 # $+9 Offset is ensuing instruction boundary
|
|
.word 0x38 # Selector is our code selector, 38h
|
|
|
|
InLongMode:
|
|
.byte 0x66
|
|
movw $0x30,%ax
|
|
movw %ax,%ds
|
|
|
|
.byte 0x66
|
|
movw $0x18,%ax
|
|
movw %ax,%es
|
|
movw %ax,%ss
|
|
movw %ax,%ds
|
|
|
|
.byte 0xbd
|
|
.long 0x400000
|
|
# mov ebp,000400000h ; Destination of EFILDR32
|
|
.byte 0xbb
|
|
.long 0x70000
|
|
# mov ebx,000070000h ; Length of copy
|
|
|
|
#
|
|
# load idt later
|
|
#
|
|
.byte 0x48
|
|
.byte 0x33
|
|
.byte 0xc0
|
|
# xor rax, rax
|
|
.byte 0x66
|
|
movw $idtr, %ax
|
|
.byte 0x48
|
|
.byte 0x5
|
|
.long 0x20000
|
|
# add rax, 20000h
|
|
|
|
.byte 0xf
|
|
.byte 0x1
|
|
.byte 0x18
|
|
# lidt fword ptr [rax]
|
|
|
|
.byte 0x48
|
|
.byte 0xc7
|
|
.byte 0xc0
|
|
.long 0x21000
|
|
# mov rax, 21000h
|
|
.byte 0x50
|
|
# push rax
|
|
|
|
# ret
|
|
.byte 0xc3
|
|
|
|
Empty8042InputBuffer:
|
|
movw $0,%cx
|
|
Empty8042Loop:
|
|
outw %ax, $DELAY_PORT # Delay 1us
|
|
inb $KBD_STATUS_PORT, %al # Read the 8042 Status Port
|
|
andb $0x2,%al # Check the Input Buffer Full Flag
|
|
loopnz Empty8042Loop # Loop until the input buffer is empty or a timout of 65536 uS
|
|
ret
|
|
|
|
##############################################################################
|
|
# data
|
|
##############################################################################
|
|
|
|
.align 0x2
|
|
|
|
gdtr: .long GDT_END - GDT_BASE - 1 # GDT limit
|
|
.long 0 # (GDT base gets set above)
|
|
##############################################################################
|
|
# global descriptor table (GDT)
|
|
##############################################################################
|
|
|
|
.align 0x2
|
|
|
|
GDT_BASE:
|
|
# null descriptor
|
|
.equ NULL_SEL, .-GDT_BASE # Selector [0x0]
|
|
.word 0 # limit 15:0
|
|
.word 0 # base 15:0
|
|
.byte 0 # base 23:16
|
|
.byte 0 # type
|
|
.byte 0 # limit 19:16, flags
|
|
.byte 0 # base 31:24
|
|
|
|
# linear data segment descriptor
|
|
.equ LINEAR_SEL, .-GDT_BASE # Selector [0x8]
|
|
.word 0xFFFF # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0x92 # present, ring 0, data, expand-up, writable
|
|
.byte 0xCF # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
# linear code segment descriptor
|
|
.equ LINEAR_CODE_SEL, .-GDT_BASE # Selector [0x10]
|
|
.word 0xFFFF # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0x9A # present, ring 0, data, expand-up, writable
|
|
.byte 0xCF # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
# system data segment descriptor
|
|
.equ SYS_DATA_SEL, .-GDT_BASE # Selector [0x18]
|
|
.word 0xFFFF # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0x92 # present, ring 0, data, expand-up, writable
|
|
.byte 0xCF # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
# system code segment descriptor
|
|
.equ SYS_CODE_SEL, .-GDT_BASE # Selector [0x20]
|
|
.word 0xFFFF # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0x9A # present, ring 0, data, expand-up, writable
|
|
.byte 0xCF # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
# spare segment descriptor
|
|
.equ SPARE3_SEL, .-GDT_BASE # Selector [0x28]
|
|
.word 0 # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0 # present, ring 0, data, expand-up, writable
|
|
.byte 0 # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
#
|
|
# system data segment descriptor
|
|
#
|
|
.equ SYS_DATA64_SEL, .-GDT_BASE # Selector [0x30]
|
|
.word 0xFFFF # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0x92 # P | DPL [1..2] | 1 | 1 | C | R | A
|
|
.byte 0xCF # G | D | L | AVL | Segment [19..16]
|
|
.byte 0
|
|
|
|
#
|
|
# system code segment descriptor
|
|
#
|
|
.equ SYS_CODE64_SEL, .-GDT_BASE # Selector [0x38]
|
|
.word 0xFFFF # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0x9A # P | DPL [1..2] | 1 | 1 | C | R | A
|
|
.byte 0xAF # G | D | L | AVL | Segment [19..16]
|
|
.byte 0
|
|
|
|
# spare segment descriptor
|
|
.equ SPARE4_SEL, .-GDT_BASE # Selector [0x40]
|
|
.word 0 # limit 0xFFFFF
|
|
.word 0 # base 0
|
|
.byte 0
|
|
.byte 0 # present, ring 0, data, expand-up, writable
|
|
.byte 0 # page-granular, 32-bit
|
|
.byte 0
|
|
|
|
GDT_END:
|
|
|
|
.align 0x2
|
|
|
|
|
|
|
|
idtr: .long IDT_END - IDT_BASE - 1 # IDT limit
|
|
.quad 0 # (IDT base gets set above)
|
|
|
|
##############################################################################
|
|
# interrupt descriptor table (IDT)
|
|
#
|
|
# Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
|
|
# mappings. This implementation only uses the system timer and all other
|
|
# IRQs will remain masked. The descriptors for vectors 33+ are provided
|
|
# for convenience.
|
|
##############################################################################
|
|
|
|
#idt_tag db "IDT",0
|
|
.align 0x2
|
|
|
|
|
|
IDT_BASE:
|
|
# divide by zero (INT 0)
|
|
.equ DIV_ZERO_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# debug exception (INT 1)
|
|
.equ DEBUG_EXCEPT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# NMI (INT 2)
|
|
.equ NMI_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# soft breakpoint (INT 3)
|
|
.equ BREAKPOINT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# overflow (INT 4)
|
|
.equ OVERFLOW_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# bounds check (INT 5)
|
|
.equ BOUNDS_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# invalid opcode (INT 6)
|
|
.equ INVALID_OPCODE_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# device not available (INT 7)
|
|
.equ DEV_NOT_AVAIL_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# double fault (INT 8)
|
|
.equ DOUBLE_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# Coprocessor segment overrun - reserved (INT 9)
|
|
.equ RSVD_INTR_SEL1, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# invalid TSS (INT 0ah)
|
|
.equ INVALID_TSS_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# segment not present (INT 0bh)
|
|
.equ SEG_NOT_PRESENT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# stack fault (INT 0ch)
|
|
.equ STACK_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# general protection (INT 0dh)
|
|
.equ GP_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# page fault (INT 0eh)
|
|
.equ PAGE_FAULT_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# Intel reserved - do not use (INT 0fh)
|
|
.equ RSVD_INTR_SEL2, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# floating point error (INT 10h)
|
|
.equ FLT_POINT_ERR_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# alignment check (INT 11h)
|
|
.equ ALIGNMENT_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# machine check (INT 12h)
|
|
.equ MACHINE_CHECK_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# SIMD floating-point exception (INT 13h)
|
|
.equ SIMD_EXCEPTION_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# 85 unspecified descriptors, First 12 of them are reserved, the rest are avail
|
|
.fill 85 * 16, 1, 0 # db (85 * 16) dup(0)
|
|
|
|
# IRQ 0 (System timer) - (INT 68h)
|
|
.equ IRQ0_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 1 (8042 Keyboard controller) - (INT 69h)
|
|
.equ IRQ1_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
|
.equ IRQ2_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 3 (COM 2) - (INT 6bh)
|
|
.equ IRQ3_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 4 (COM 1) - (INT 6ch)
|
|
.equ IRQ4_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 5 (LPT 2) - (INT 6dh)
|
|
.equ IRQ5_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 6 (Floppy controller) - (INT 6eh)
|
|
.equ IRQ6_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 7 (LPT 1) - (INT 6fh)
|
|
.equ IRQ7_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 8 (RTC Alarm) - (INT 70h)
|
|
.equ IRQ8_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 9 - (INT 71h)
|
|
.equ IRQ9_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
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|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
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|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
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|
.long 0 # 0 for reserved
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|
|
|
# IRQ 10 - (INT 72h)
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|
.equ IRQ10_SEL, .-IDT_BASE
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|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 11 - (INT 73h)
|
|
.equ IRQ11_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 12 (PS/2 mouse) - (INT 74h)
|
|
.equ IRQ12_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 13 (Floating point error) - (INT 75h)
|
|
.equ IRQ13_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 14 (Secondary IDE) - (INT 76h)
|
|
.equ IRQ14_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
# IRQ 15 (Primary IDE) - (INT 77h)
|
|
.equ IRQ15_SEL, .-IDT_BASE
|
|
.word 0 # offset 15:0
|
|
.long SYS_CODE64_SEL # selector 15:0
|
|
.byte 0 # 0 for interrupt gate
|
|
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
|
.word 0 # offset 31:16
|
|
.long 0 # offset 63:32
|
|
.long 0 # 0 for reserved
|
|
|
|
IDT_END:
|
|
|
|
.align 0x2
|
|
|
|
MemoryMapSize: .long 0
|
|
MemoryMap: .long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0
|
|
|
|
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|
.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|
|
|
#.org 0x0fe0 #Just for pass build
|
|
MyStack:
|
|
# below is the pieces of the IVT that is used to redirect INT 68h - 6fh
|
|
# back to INT 08h - 0fh when in real mode... It is 'org'ed to a
|
|
# known low address (20f00) so it can be set up by PlMapIrqToVect in
|
|
# 8259.c
|
|
|
|
int $8
|
|
iret
|
|
|
|
int $9
|
|
iret
|
|
|
|
int $10
|
|
iret
|
|
|
|
int $11
|
|
iret
|
|
|
|
int $12
|
|
iret
|
|
|
|
int $13
|
|
iret
|
|
|
|
int $14
|
|
iret
|
|
|
|
int $15
|
|
iret
|
|
|
|
|
|
#.org 0x0ffe #Just for pass build
|
|
BlockSignature:
|
|
.word 0xaa55
|
|
|