mirror of https://github.com/acidanthera/audk.git
157 lines
3.9 KiB
C
157 lines
3.9 KiB
C
/** @file
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Processor power management initialization code.
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _PPM_H
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#define _PPM_H
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//
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// Bit definitions of PPMFlags
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//
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#define PPM_GV3 (1 << 0) // Geyserville 3
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#define PPM_TURBO (1 << 1) // Turbo Mode
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#define PPM_SUPER_LFM (1 << 2) // N/2 Ratio
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#define PPM_C1 (1 << 4) // C1 Capable, Enabled
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#define PPM_C2 (1 << 5) // C2 Capable, Enabled
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#define PPM_C3 (1 << 6) // C3 Capable, Enabled
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#define PPM_C4 (1 << 7) // C4 Capable, Enabled
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#define PPM_C5 (1 << 8) // C5/Deep C4 Capable, Enabled
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#define PPM_C6 (1 << 9) // C6 Capable, Enabled
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#define PPM_C1E (1 << 10) // C1E Enabled
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#define PPM_C2E (1 << 11) // C2E Enabled
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#define PPM_C3E (1 << 12) // C3E Enabled
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#define PPM_C4E (1 << 13) // C4E Enabled
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#define PPM_HARD_C4E (1 << 14) // Hard C4E Capable, Enabled
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#define PPM_TM1 (1 << 16) // Thermal Monitor 1
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#define PPM_TM2 (1 << 17) // Thermal Monitor 2
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#define PPM_PHOT (1 << 19) // Bi-directional ProcHot
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#define PPM_MWAIT_EXT (1 << 21) // MWAIT extensions supported
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#define PPM_CMP (1 << 24) // CMP supported, Enabled
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#define PPM_TSTATE (1 << 28) // CPU T states supported
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#define PPM_C_STATES (PPM_C1 + PPM_C2 + PPM_C3 + PPM_C4 + PPM_C5 + PPM_C6)
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#define PPM_CE_STATES (PPM_C1E + PPM_C2E + PPM_C3E + PPM_C4E + PPM_HARD_C4E)
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#define MAX_P_STATES_NUM 12
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#define AML_NAME_OP 0x08
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#define AML_SCOPE_OP 0x10
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#define AML_PACKAGE_OP 0x12
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#define AML_METHOD_OP 0x14
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#define S3_CPU_REGISTER_TABLE_GUID \
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{ \
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0xc4ef988d, 0xe5e, 0x4403, { 0xbe, 0xeb, 0xf1, 0xbb, 0x6, 0x79, 0x6e, 0xdf } \
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}
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#pragma pack(1)
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typedef struct {
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UINT8 StartByte;
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UINT32 NameStr;
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UINT8 OpCode;
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UINT16 Size; // Hardcode to 16bit width because the table we use is fixed size
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UINT8 NumEntries;
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} EFI_ACPI_NAME_COMMAND;
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typedef struct {
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UINT8 PackageOp;
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UINT8 PkgLeadByte;
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UINT8 NumEntries;
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UINT8 DwordPrefix0;
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UINT32 CoreFreq;
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UINT8 DwordPrefix1;
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UINT32 Power;
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UINT8 DwordPrefix2;
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UINT32 TransLatency;
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UINT8 DwordPrefix3;
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UINT32 BMLatency;
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UINT8 DwordPrefix4;
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UINT32 Control;
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UINT8 DwordPrefix5;
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UINT32 Status;
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} EFI_PSS_PACKAGE;
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#pragma pack()
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typedef struct {
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UINT32 Index;
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UINT64 Value;
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} S3_CPU_REGISTER;
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//
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// Function prototypes
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//
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/**
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This function is the entry of processor power management initialization code.
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It initializes the processor's power management features based on the user
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configurations and hardware capablities.
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**/
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VOID
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PpmInit (
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VOID
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);
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/**
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This function is to determine the Processor Power Management Flags
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based on the hardware capability.
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**/
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VOID
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PpmDetectCapability (
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VOID
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);
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/**
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This function is to determine the user configuration mask
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**/
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VOID
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PpmGetUserConfigurationMask (
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VOID
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);
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/**
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This function is to patch and publish power management related acpi tables.
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**/
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VOID
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PpmPatchAndPublishAcpiTables (
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VOID
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);
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/**
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This function is to patch PLvl2Lat and PLvl3Lat to enable C2, C3 support in OS.
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**/
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VOID
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PpmPatchFadtTable (
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VOID
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);
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/**
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This function is to load all the power management acpi tables and patch IST table.
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**/
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VOID
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PpmLoadAndPatchPMTables (
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VOID
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);
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/**
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This function is to save cpu registers for s3 resume.
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**/
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VOID
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PpmS3SaveRegisters (
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VOID
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);
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#endif
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