mirror of https://github.com/acidanthera/audk.git
692 lines
20 KiB
C
692 lines
20 KiB
C
/** @file
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Main SAL API's defined in SAL 3.0 specification.
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name: SalApi.h
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**/
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#ifndef __SAL_API_H__
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#define __SAL_API_H__
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typedef UINTN EFI_SAL_STATUS;
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//
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// EFI_SAL_STATUS defines
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//
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#define EFI_SAL_SUCCESS ((EFI_SAL_STATUS) 0)
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#define EFI_SAL_MORE_RECORDS ((EFI_SAL_STATUS) 3)
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#define EFI_SAL_NOT_IMPLEMENTED ((EFI_SAL_STATUS) - 1)
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#define EFI_SAL_INVALID_ARGUMENT ((EFI_SAL_STATUS) - 2)
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#define EFI_SAL_ERROR ((EFI_SAL_STATUS) - 3)
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#define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
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#define EFI_SAL_NO_INFORMATION ((EFI_SAL_STATUS) - 5)
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#define EFI_SAL_NOT_ENOUGH_SCRATCH ((EFI_SAL_STATUS) - 9)
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//
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// Return values from SAL
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//
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typedef struct {
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EFI_SAL_STATUS Status; // register r8
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UINTN r9;
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UINTN r10;
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UINTN r11;
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} SAL_RETURN_REGS;
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typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)
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(
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IN UINT64 FunctionId,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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IN UINT64 Arg4,
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IN UINT64 Arg5,
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IN UINT64 Arg6,
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IN UINT64 Arg7,
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IN UINT64 Arg8
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);
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//
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// SAL Procedure FunctionId definition
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//
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#define EFI_SAL_SET_VECTORS 0x01000000
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#define EFI_SAL_GET_STATE_INFO 0x01000001
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#define EFI_SAL_GET_STATE_INFO_SIZE 0x01000002
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#define EFI_SAL_CLEAR_STATE_INFO 0x01000003
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#define EFI_SAL_MC_RENDEZ 0x01000004
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#define EFI_SAL_MC_SET_PARAMS 0x01000005
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#define EFI_SAL_REGISTER_PHYSICAL_ADDR 0x01000006
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#define EFI_SAL_CACHE_FLUSH 0x01000008
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#define EFI_SAL_CACHE_INIT 0x01000009
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#define EFI_SAL_PCI_CONFIG_READ 0x01000010
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#define EFI_SAL_PCI_CONFIG_WRITE 0x01000011
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#define EFI_SAL_FREQ_BASE 0x01000012
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#define EFI_SAL_UPDATE_PAL 0x01000020
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#define EFI_SAL_FUNCTION_ID_MASK 0x0000ffff
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#define EFI_SAL_MAX_SAL_FUNCTION_ID 0x00000021
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//
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// SAL Procedure parameter definitions
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// Not much point in using typedefs or enums because all params
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// are UINT64 and the entry point is common
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//
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// EFI_SAL_SET_VECTORS
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//
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#define EFI_SAL_SET_MCA_VECTOR 0x0
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#define EFI_SAL_SET_INIT_VECTOR 0x1
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#define EFI_SAL_SET_BOOT_RENDEZ_VECTOR 0x2
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typedef struct {
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UINT64 Length : 32;
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UINT64 ChecksumValid : 1;
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UINT64 Reserved1 : 7;
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UINT64 ByteChecksum : 8;
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UINT64 Reserved2 : 16;
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} SAL_SET_VECTORS_CS_N;
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//
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// EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
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// EFI_SAL_CLEAR_STATE_INFO
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//
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#define EFI_SAL_MCA_STATE_INFO 0x0
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#define EFI_SAL_INIT_STATE_INFO 0x1
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#define EFI_SAL_CMC_STATE_INFO 0x2
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#define EFI_SAL_CP_STATE_INFO 0x3
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//
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// EFI_SAL_MC_SET_PARAMS
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//
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#define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
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#define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
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#define EFI_SAL_MC_SET_CPE_PARAM 0x3
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#define EFI_SAL_MC_SET_INTR_PARAM 0x1
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#define EFI_SAL_MC_SET_MEM_PARAM 0x2
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//
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// EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
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//
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#define EFI_SAL_REGISTER_PAL_ADDR 0x0
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//
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// EFI_SAL_CACHE_FLUSH
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//
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#define EFI_SAL_FLUSH_I_CACHE 0x01
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#define EFI_SAL_FLUSH_D_CACHE 0x02
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#define EFI_SAL_FLUSH_BOTH_CACHE 0x03
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#define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
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//
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// EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
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//
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#define EFI_SAL_PCI_CONFIG_ONE_BYTE 0x1
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#define EFI_SAL_PCI_CONFIG_TWO_BYTES 0x2
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#define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
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typedef struct {
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UINT64 Register : 8;
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UINT64 Function : 3;
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UINT64 Device : 5;
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UINT64 Bus : 8;
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UINT64 Segment : 8;
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UINT64 Reserved : 32;
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} SAL_PCI_ADDRESS;
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//
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// EFI_SAL_FREQ_BASE
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//
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#define EFI_SAL_CPU_INPUT_FREQ_BASE 0x0
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#define EFI_SAL_PLATFORM_IT_FREQ_BASE 0x1
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#define EFI_SAL_PLATFORM_RTC_FREQ_BASE 0x2
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//
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// EFI_SAL_UPDATE_PAL
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//
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#define EFI_SAL_UPDATE_BAD_PAL_VERSION ((UINT64) -1)
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#define EFI_SAL_UPDATE_PAL_AUTH_FAIL ((UINT64) -2)
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#define EFI_SAL_UPDATE_PAL_BAD_TYPE ((UINT64) -3)
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#define EFI_SAL_UPDATE_PAL_READONLY ((UINT64) -4)
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#define EFI_SAL_UPDATE_PAL_WRITE_FAIL ((UINT64) -10)
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#define EFI_SAL_UPDATE_PAL_ERASE_FAIL ((UINT64) -11)
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#define EFI_SAL_UPDATE_PAL_READ_FAIL ((UINT64) -12)
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#define EFI_SAL_UPDATE_PAL_CANT_FIT ((UINT64) -13)
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typedef struct {
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UINT32 Size;
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UINT32 MmddyyyyDate;
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UINT16 Version;
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UINT8 Type;
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UINT8 Reserved[5];
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UINT64 FwVendorId;
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} SAL_UPDATE_PAL_DATA_BLOCK;
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typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {
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struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;
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struct SAL_UPDATE_PAL_DATA_BLOCK *DataBlock;
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UINT8 StoreChecksum;
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UINT8 Reserved[15];
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} SAL_UPDATE_PAL_INFO_BLOCK;
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//
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// SAL System Table Definitions
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//
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#pragma pack(1)
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typedef struct {
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UINT32 Signature;
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UINT32 Length;
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UINT16 SalRevision;
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UINT16 EntryCount;
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UINT8 CheckSum;
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UINT8 Reserved[7];
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UINT16 SalAVersion;
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UINT16 SalBVersion;
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UINT8 OemId[32];
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UINT8 ProductId[32];
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UINT8 Reserved2[8];
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} SAL_SYSTEM_TABLE_HEADER;
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#pragma pack()
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#define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
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#define EFI_SAL_REVISION 0x0300
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//
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// SAL System Types
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//
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#define EFI_SAL_ST_ENTRY_POINT 0
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#define EFI_SAL_ST_MEMORY_DESCRIPTOR 1
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#define EFI_SAL_ST_PLATFORM_FEATURES 2
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#define EFI_SAL_ST_TR_USAGE 3
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#define EFI_SAL_ST_PTC 4
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#define EFI_SAL_ST_AP_WAKEUP 5
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#pragma pack(1)
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typedef struct {
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UINT8 Type; // Type == 0
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UINT8 Reserved[7];
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UINT64 PalProcEntry;
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UINT64 SalProcEntry;
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UINT64 SalGlobalDataPointer;
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UINT64 Reserved2[2];
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} SAL_ST_ENTRY_POINT_DESCRIPTOR;
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//
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// Not needed for Itanium-based OS boot
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//
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typedef struct {
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UINT8 Type; // Type == 1
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UINT8 NeedVirtualRegistration;
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UINT8 MemoryAttributes;
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UINT8 PageAccessRights;
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UINT8 SupportedAttributes;
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UINT8 Reserved;
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UINT8 MemoryType;
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UINT8 MemoryUsage;
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UINT64 PhysicalMemoryAddress;
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UINT32 Length;
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UINT32 Reserved1;
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UINT64 OemReserved;
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} SAL_ST_MEMORY_DESCRIPTOR_ENTRY;
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#pragma pack()
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//
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// Memory Attributes
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//
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#define SAL_MDT_ATTRIB_WB 0x00
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//
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// #define SAL_MDT_ATTRIB_UC 0x02
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//
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#define SAL_MDT_ATTRIB_UC 0x04
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#define SAL_MDT_ATTRIB_UCE 0x05
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#define SAL_MDT_ATTRIB_WC 0x06
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//
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// Supported memory Attributes
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//
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#define SAL_MDT_SUPPORT_WB 0x1
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#define SAL_MDT_SUPPORT_UC 0x2
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#define SAL_MDT_SUPPORT_UCE 0x4
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#define SAL_MDT_SUPPORT_WC 0x8
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//
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// Virtual address registration
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//
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#define SAL_MDT_NO_VA 0x00
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#define SAL_MDT_NEED_VA 0x01
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//
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// MemoryType info
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//
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#define SAL_REGULAR_MEMORY 0x0000
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#define SAL_MMIO_MAPPING 0x0001
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#define SAL_SAPIC_IPI_BLOCK 0x0002
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#define SAL_IO_PORT_MAPPING 0x0003
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#define SAL_FIRMWARE_MEMORY 0x0004
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#define SAL_BLACK_HOLE 0x000A
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//
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// Memory Usage info
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//
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#define SAL_MDT_USAGE_UNSPECIFIED 0x00
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#define SAL_PAL_CODE 0x01
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#define SAL_BOOTSERVICE_CODE 0x02
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#define SAL_BOOTSERVICE_DATA 0x03
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#define SAL_RUNTIMESERVICE_CODE 0x04
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#define SAL_RUNTIMESERVICE_DATA 0x05
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#define SAL_IA32_OPTIONROM 0x06
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#define SAL_IA32_SYSTEMROM 0x07
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#define SAL_PMI_CODE 0x0a
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#define SAL_PMI_DATA 0x0b
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#pragma pack(1)
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typedef struct {
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UINT8 Type; // Type == 2
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UINT8 PlatformFeatures;
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UINT8 Reserved[14];
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} SAL_ST_PLATFORM_FEATURES;
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#pragma pack()
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#define SAL_PLAT_FEAT_BUS_LOCK 0x01
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#define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
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#define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
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#pragma pack(1)
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typedef struct {
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UINT8 Type; // Type == 3
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UINT8 TRType;
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UINT8 TRNumber;
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UINT8 Reserved[5];
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UINT64 VirtualAddress;
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UINT64 EncodedPageSize;
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UINT64 Reserved1;
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} SAL_ST_TR_DECRIPTOR;
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#pragma pack()
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#define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
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#define EFI_SAL_ST_TR_USAGE_DATA 01
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#pragma pack(1)
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typedef struct {
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UINT64 NumberOfProcessors;
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UINT64 LocalIDRegister;
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} SAL_COHERENCE_DOMAIN_INFO;
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#pragma pack()
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#pragma pack(1)
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typedef struct {
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UINT8 Type; // Type == 4
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UINT8 Reserved[3];
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UINT32 NumberOfDomains;
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SAL_COHERENCE_DOMAIN_INFO *DomainInformation;
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} SAL_ST_CACHE_COHERENCE_DECRIPTOR;
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#pragma pack()
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#pragma pack(1)
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typedef struct {
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UINT8 Type; // Type == 5
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UINT8 WakeUpType;
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UINT8 Reserved[6];
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UINT64 ExternalInterruptVector;
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} SAL_ST_AP_WAKEUP_DECRIPTOR;
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#pragma pack()
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//
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// FIT Entry
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//
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#define EFI_SAL_FIT_ENTRY_PTR (0x100000000 - 32) // 4GB - 24
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#define EFI_SAL_FIT_PALA_ENTRY (0x100000000 - 48) // 4GB - 32
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#define EFI_SAL_FIT_PALB_TYPE 01
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typedef struct {
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UINT64 Address;
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UINT8 Size[3];
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UINT8 Reserved;
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UINT16 Revision;
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UINT8 Type : 7;
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UINT8 CheckSumValid : 1;
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UINT8 CheckSum;
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} EFI_SAL_FIT_ENTRY;
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//
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// SAL Common Record Header
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//
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typedef struct {
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UINT16 Length;
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UINT8 Data[1024];
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} SAL_OEM_DATA;
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typedef struct {
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UINT8 Seconds;
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UINT8 Minutes;
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UINT8 Hours;
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UINT8 Reserved;
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UINT8 Day;
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UINT8 Month;
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UINT8 Year;
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UINT8 Century;
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} SAL_TIME_STAMP;
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typedef struct {
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UINT64 RecordId;
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UINT16 Revision;
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UINT8 ErrorSeverity;
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UINT8 ValidationBits;
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UINT32 RecordLength;
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SAL_TIME_STAMP TimeStamp;
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UINT8 OemPlatformId[16];
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} SAL_RECORD_HEADER;
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typedef struct {
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EFI_GUID Guid;
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UINT16 Revision;
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UINT8 ErrorRecoveryInfo;
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UINT8 Reserved;
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UINT32 SectionLength;
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} SAL_SEC_HEADER;
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//
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// SAL Processor Record
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//
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#define SAL_PROCESSOR_ERROR_RECORD_INFO \
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{ \
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0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
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}
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#define CHECK_INFO_VALID_BIT_MASK 0x1
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#define REQUESTOR_ID_VALID_BIT_MASK 0x2
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#define RESPONDER_ID_VALID_BIT_MASK 0x4
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#define TARGER_ID_VALID_BIT_MASK 0x8
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#define PRECISE_IP_VALID_BIT_MASK 0x10
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typedef struct {
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UINT64 InfoValid : 1;
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UINT64 ReqValid : 1;
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UINT64 RespValid : 1;
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UINT64 TargetValid : 1;
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UINT64 IpValid : 1;
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UINT64 Reserved : 59;
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UINT64 Info;
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UINT64 Req;
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UINT64 Resp;
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UINT64 Target;
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UINT64 Ip;
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} MOD_ERROR_INFO;
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typedef struct {
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UINT8 CpuidInfo[40];
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UINT8 Reserved;
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} CPUID_INFO;
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typedef struct {
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UINT64 FrLow;
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UINT64 FrHigh;
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} FR_STRUCT;
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#define MIN_STATE_VALID_BIT_MASK 0x1
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#define BR_VALID_BIT_MASK 0x2
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#define CR_VALID_BIT_MASK 0x4
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#define AR_VALID_BIT_MASK 0x8
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#define RR_VALID_BIT_MASK 0x10
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#define FR_VALID_BIT_MASK 0x20
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typedef struct {
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UINT64 ValidFieldBits;
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UINT8 MinStateInfo[1024];
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UINT64 Br[8];
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UINT64 Cr[128];
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UINT64 Ar[128];
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UINT64 Rr[8];
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FR_STRUCT Fr[128];
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} PSI_STATIC_STRUCT;
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#define PROC_ERROR_MAP_VALID_BIT_MASK 0x1
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#define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
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#define PROC_CR_LID_VALID_BIT_MASK 0x4
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#define PROC_STATIC_STRUCT_VALID_BIT_MASK 0x8
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#define CPU_INFO_VALID_BIT_MASK 0x1000000
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typedef struct {
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SAL_SEC_HEADER SectionHeader;
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UINT64 ValidationBits;
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UINT64 ProcErrorMap;
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UINT64 ProcStateParameter;
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UINT64 ProcCrLid;
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MOD_ERROR_INFO CacheError[15];
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MOD_ERROR_INFO TlbError[15];
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MOD_ERROR_INFO BusError[15];
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MOD_ERROR_INFO RegFileCheck[15];
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MOD_ERROR_INFO MsCheck[15];
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CPUID_INFO CpuInfo;
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PSI_STATIC_STRUCT PsiValidData;
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} SAL_PROCESSOR_ERROR_RECORD;
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//
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// Sal Platform memory Error Record
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//
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#define SAL_MEMORY_ERROR_RECORD_INFO \
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{ \
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0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
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}
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#define MEMORY_ERROR_STATUS_VALID_BIT_MASK 0x1
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#define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK 0x2
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#define MEMORY_ADDR_BIT_MASK 0x4
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#define MEMORY_NODE_VALID_BIT_MASK 0x8
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#define MEMORY_CARD_VALID_BIT_MASK 0x10
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#define MEMORY_MODULE_VALID_BIT_MASK 0x20
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#define MEMORY_BANK_VALID_BIT_MASK 0x40
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#define MEMORY_DEVICE_VALID_BIT_MASK 0x80
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#define MEMORY_ROW_VALID_BIT_MASK 0x100
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#define MEMORY_COLUMN_VALID_BIT_MASK 0x200
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#define MEMORY_BIT_POSITION_VALID_BIT_MASK 0x400
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#define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x800
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#define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x1000
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#define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK 0x2000
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#define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK 0x4000
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#define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK 0x8000
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#define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x10000
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typedef struct {
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SAL_SEC_HEADER SectionHeader;
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UINT64 ValidationBits;
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UINT64 MemErrorStatus;
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UINT64 MemPhysicalAddress;
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UINT64 MemPhysicalAddressMask;
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UINT16 MemNode;
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UINT16 MemCard;
|
|
UINT16 MemModule;
|
|
UINT16 MemBank;
|
|
UINT16 MemDevice;
|
|
UINT16 MemRow;
|
|
UINT16 MemColumn;
|
|
UINT16 MemBitPosition;
|
|
UINT64 ModRequestorId;
|
|
UINT64 ModResponderId;
|
|
UINT64 ModTargetId;
|
|
UINT64 BusSpecificData;
|
|
UINT8 MemPlatformOemId[16];
|
|
} SAL_MEMORY_ERROR_RECORD;
|
|
|
|
//
|
|
// PCI BUS Errors
|
|
//
|
|
#define SAL_PCI_BUS_ERROR_RECORD_INFO \
|
|
{ \
|
|
0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
|
|
}
|
|
|
|
#define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK 0x1
|
|
#define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK 0x2
|
|
#define PCI_BUS_ID_VALID_BIT_MASK 0x4
|
|
#define PCI_BUS_ADDRESS_VALID_BIT_MASK 0x8
|
|
#define PCI_BUS_DATA_VALID_BIT_MASK 0x10
|
|
#define PCI_BUS_CMD_VALID_BIT_MASK 0x20
|
|
#define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK 0x40
|
|
#define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK 0x80
|
|
#define PCI_BUS_TARGET_VALID_BIT_MASK 0x100
|
|
#define PCI_BUS_OEM_ID_VALID_BIT_MASK 0x200
|
|
#define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK 0x400
|
|
|
|
typedef struct {
|
|
UINT8 BusNumber;
|
|
UINT8 SegmentNumber;
|
|
} PCI_BUS_ID;
|
|
|
|
typedef struct {
|
|
SAL_SEC_HEADER SectionHeader;
|
|
UINT64 ValidationBits;
|
|
UINT64 PciBusErrorStatus;
|
|
UINT16 PciBusErrorType;
|
|
PCI_BUS_ID PciBusId;
|
|
UINT32 Reserved;
|
|
UINT64 PciBusAddress;
|
|
UINT64 PciBusData;
|
|
UINT64 PciBusCommand;
|
|
UINT64 PciBusRequestorId;
|
|
UINT64 PciBusResponderId;
|
|
UINT64 PciBusTargetId;
|
|
UINT8 PciBusOemId[16];
|
|
} SAL_PCI_BUS_ERROR_RECORD;
|
|
|
|
//
|
|
// PCI Component Errors
|
|
//
|
|
#define SAL_PCI_COMP_ERROR_RECORD_INFO \
|
|
{ \
|
|
0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
|
|
}
|
|
|
|
#define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK 0x1
|
|
#define PCI_COMP_INFO_VALID_BIT_MASK 0x2
|
|
#define PCI_COMP_MEM_NUM_VALID_BIT_MASK 0x4
|
|
#define PCI_COMP_IO_NUM_VALID_BIT_MASK 0x8
|
|
#define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK 0x10
|
|
#define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
|
|
|
|
typedef struct {
|
|
UINT16 VendorId;
|
|
UINT16 DeviceId;
|
|
UINT8 ClassCode[3];
|
|
UINT8 FunctionNumber;
|
|
UINT8 DeviceNumber;
|
|
UINT8 BusNumber;
|
|
UINT8 SegmentNumber;
|
|
UINT8 Reserved[5];
|
|
} PCI_COMP_INFO;
|
|
|
|
typedef struct {
|
|
SAL_SEC_HEADER SectionHeader;
|
|
UINT64 ValidationBits;
|
|
UINT64 PciComponentErrorStatus;
|
|
PCI_COMP_INFO PciComponentInfo;
|
|
UINT32 PciComponentMemNum;
|
|
UINT32 PciComponentIoNum;
|
|
UINT8 PciBusOemId[16];
|
|
} SAL_PCI_COMPONENT_ERROR_RECORD;
|
|
|
|
//
|
|
// Sal Device Errors Info.
|
|
//
|
|
#define SAL_DEVICE_ERROR_RECORD_INFO \
|
|
{ \
|
|
0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
|
|
}
|
|
|
|
#define SEL_RECORD_ID_VALID_BIT_MASK 0x1;
|
|
#define SEL_RECORD_TYPE_VALID_BIT_MASK 0x2;
|
|
#define SEL_GENERATOR_ID_VALID_BIT_MASK 0x4;
|
|
#define SEL_EVM_REV_VALID_BIT_MASK 0x8;
|
|
#define SEL_SENSOR_TYPE_VALID_BIT_MASK 0x10;
|
|
#define SEL_SENSOR_NUM_VALID_BIT_MASK 0x20;
|
|
#define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
|
|
#define SEL_EVENT_DATA1_VALID_BIT_MASK 0x80;
|
|
#define SEL_EVENT_DATA2_VALID_BIT_MASK 0x100;
|
|
#define SEL_EVENT_DATA3_VALID_BIT_MASK 0x200;
|
|
|
|
typedef struct {
|
|
SAL_SEC_HEADER SectionHeader;
|
|
UINT64 ValidationBits;
|
|
UINT16 SelRecordId;
|
|
UINT8 SelRecordType;
|
|
UINT32 TimeStamp;
|
|
UINT16 GeneratorId;
|
|
UINT8 EvmRevision;
|
|
UINT8 SensorType;
|
|
UINT8 SensorNum;
|
|
UINT8 EventDirType;
|
|
UINT8 Data1;
|
|
UINT8 Data2;
|
|
UINT8 Data3;
|
|
} SAL_DEVICE_ERROR_RECORD;
|
|
|
|
//
|
|
// Sal SMBIOS Device Errors Info.
|
|
//
|
|
#define SAL_SMBIOS_ERROR_RECORD_INFO \
|
|
{ \
|
|
0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
|
|
}
|
|
|
|
#define SMBIOS_EVENT_TYPE_VALID_BIT_MASK 0x1
|
|
#define SMBIOS_LENGTH_VALID_BIT_MASK 0x2
|
|
#define SMBIOS_TIME_STAMP_VALID_BIT_MASK 0x4
|
|
#define SMBIOS_DATA_VALID_BIT_MASK 0x8
|
|
|
|
typedef struct {
|
|
SAL_SEC_HEADER SectionHeader;
|
|
UINT64 ValidationBits;
|
|
UINT8 SmbiosEventType;
|
|
UINT8 SmbiosLength;
|
|
UINT8 SmbiosBcdTimeStamp[6];
|
|
} SAL_SMBIOS_DEVICE_ERROR_RECORD;
|
|
|
|
//
|
|
// Sal Platform Specific Errors Info.
|
|
//
|
|
#define SAL_PLATFORM_ERROR_RECORD_INFO \
|
|
{ \
|
|
0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
|
|
}
|
|
|
|
#define PLATFORM_ERROR_STATUS_VALID_BIT_MASK 0x1
|
|
#define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x2
|
|
#define PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x4
|
|
#define PLATFORM_TARGET_VALID_BIT_MASK 0x8
|
|
#define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK 0x10
|
|
#define PLATFORM_OEM_ID_VALID_BIT_MASK 0x20
|
|
#define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
|
|
#define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
|
|
|
|
typedef struct {
|
|
SAL_SEC_HEADER SectionHeader;
|
|
UINT64 ValidationBits;
|
|
UINT64 PlatformErrorStatus;
|
|
UINT64 PlatformRequestorId;
|
|
UINT64 PlatformResponderId;
|
|
UINT64 PlatformTargetId;
|
|
UINT64 PlatformBusSpecificData;
|
|
UINT8 OemComponentId[16];
|
|
} SAL_PLATFORM_SPECIFIC_ERROR_RECORD;
|
|
|
|
//
|
|
// Union of all the possible Sal Record Types
|
|
//
|
|
typedef union {
|
|
SAL_RECORD_HEADER *RecordHeader;
|
|
SAL_PROCESSOR_ERROR_RECORD *SalProcessorRecord;
|
|
SAL_PCI_BUS_ERROR_RECORD *SalPciBusRecord;
|
|
SAL_PCI_COMPONENT_ERROR_RECORD *SalPciComponentRecord;
|
|
SAL_DEVICE_ERROR_RECORD *ImpiRecord;
|
|
SAL_SMBIOS_DEVICE_ERROR_RECORD *SmbiosRecord;
|
|
SAL_PLATFORM_SPECIFIC_ERROR_RECORD *PlatformRecord;
|
|
SAL_MEMORY_ERROR_RECORD *MemoryRecord;
|
|
UINT8 *Raw;
|
|
} SAL_ERROR_RECORDS_POINTERS;
|
|
|
|
#pragma pack()
|
|
|
|
#endif
|