mirror of https://github.com/acidanthera/audk.git
72 lines
1.8 KiB
NASM
72 lines
1.8 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; First code executed by processor after resetting.
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;
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; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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BITS 16
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ALIGN 16
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;
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; Pad the image size to 4k when page tables are in VTF0
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;
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; If the VTF0 image has page tables built in, then we need to make
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; sure the end of VTF0 is 4k above where the page tables end.
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;
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; This is required so the page tables will be 4k aligned when VTF0 is
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; located just below 0x100000000 (4GB) in the firmware device.
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;
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%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
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TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
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%endif
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applicationProcessorEntryPoint:
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;
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; Application Processors entry point
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;
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; GenFv generates code aligned on a 4k boundary which will jump to this
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; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
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; used to wake up the application processors.
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;
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jmp EarlyApInitReal16
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ALIGN 8
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DD 0
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;
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; The VTF signature
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;
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; VTF-0 means that the VTF (Volume Top File) code does not require
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; any fixups.
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;
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vtfSignature:
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DB 'V', 'T', 'F', 0
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ALIGN 16
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resetVector:
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;
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; Reset Vector
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;
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; This is where the processor will begin execution
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;
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nop
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nop
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jmp EarlyBspInitReal16
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ALIGN 16
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fourGigabytes:
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