mirror of https://github.com/acidanthera/audk.git
173 lines
3.6 KiB
C
173 lines
3.6 KiB
C
/** @file
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PlatformInitLib header file.
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef PLATFORM_INIT_LIB_H_
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#define PLATFORM_INIT_LIB_H_
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#include <PiPei.h>
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#pragma pack(1)
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typedef struct {
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EFI_HOB_GUID_TYPE GuidHeader;
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UINT16 HostBridgeDevId;
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UINT64 PcdConfidentialComputingGuestAttr;
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BOOLEAN SevEsIsEnabled;
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UINT32 BootMode;
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BOOLEAN S3Supported;
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BOOLEAN SmmSmramRequire;
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BOOLEAN Q35SmramAtDefaultSmbase;
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UINT16 Q35TsegMbytes;
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UINT64 FirstNonAddress;
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UINT8 PhysMemAddressWidth;
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UINT32 Uc32Base;
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UINT32 Uc32Size;
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BOOLEAN PcdSetNxForStack;
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UINT64 PcdTdxSharedBitMask;
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UINT64 PcdPciMmio64Base;
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UINT64 PcdPciMmio64Size;
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UINT32 PcdPciMmio32Base;
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UINT32 PcdPciMmio32Size;
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UINT64 PcdPciIoBase;
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UINT64 PcdPciIoSize;
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UINT64 PcdEmuVariableNvStoreReserved;
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UINT32 PcdCpuBootLogicalProcessorNumber;
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UINT32 PcdCpuMaxLogicalProcessorNumber;
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UINT32 DefaultMaxCpuNumber;
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UINT32 S3AcpiReservedMemoryBase;
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UINT32 S3AcpiReservedMemorySize;
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} EFI_HOB_PLATFORM_INFO;
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#pragma pack()
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/**
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Reads 8-bits of CMOS data.
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Reads the 8-bits of CMOS data at the location specified by Index.
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The 8-bit read value is returned.
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@param Index The CMOS location to read.
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@return The value read.
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**/
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UINT8
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EFIAPI
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PlatformCmosRead8 (
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IN UINTN Index
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);
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/**
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Writes 8-bits of CMOS data.
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Writes 8-bits of CMOS data to the location specified by Index
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with the value specified by Value and returns Value.
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@param Index The CMOS location to write.
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@param Value The value to write to CMOS.
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@return The value written to CMOS.
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**/
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UINT8
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EFIAPI
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PlatformCmosWrite8 (
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IN UINTN Index,
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IN UINT8 Value
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);
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/**
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Dump the CMOS content
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*/
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VOID
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EFIAPI
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PlatformDebugDumpCmos (
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VOID
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);
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VOID
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EFIAPI
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PlatformAddIoMemoryBaseSizeHob (
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IN EFI_PHYSICAL_ADDRESS MemoryBase,
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IN UINT64 MemorySize
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);
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VOID
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EFIAPI
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PlatformAddIoMemoryRangeHob (
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IN EFI_PHYSICAL_ADDRESS MemoryBase,
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IN EFI_PHYSICAL_ADDRESS MemoryLimit
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);
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VOID
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EFIAPI
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PlatformAddMemoryBaseSizeHob (
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IN EFI_PHYSICAL_ADDRESS MemoryBase,
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IN UINT64 MemorySize
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);
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VOID
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EFIAPI
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PlatformAddMemoryRangeHob (
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IN EFI_PHYSICAL_ADDRESS MemoryBase,
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IN EFI_PHYSICAL_ADDRESS MemoryLimit
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);
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VOID
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EFIAPI
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PlatformAddReservedMemoryBaseSizeHob (
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IN EFI_PHYSICAL_ADDRESS MemoryBase,
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IN UINT64 MemorySize,
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IN BOOLEAN Cacheable
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);
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VOID
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EFIAPI
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PlatformQemuUc32BaseInitialization (
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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);
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UINT32
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EFIAPI
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PlatformGetSystemMemorySizeBelow4gb (
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IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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);
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/**
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Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.
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**/
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VOID
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EFIAPI
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PlatformAddressWidthInitialization (
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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);
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/**
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Peform Memory Detection for QEMU / KVM
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**/
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VOID
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EFIAPI
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PlatformQemuInitializeRam (
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IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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);
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VOID
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EFIAPI
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PlatformQemuInitializeRamForS3 (
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IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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);
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#endif // PLATFORM_INIT_LIB_H_
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