mirror of https://github.com/acidanthera/audk.git
195 lines
5.9 KiB
C
Executable File
195 lines
5.9 KiB
C
Executable File
/**@file
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Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
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Copyright (c) 2011, ARM Limited. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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MemoryInit.c
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Abstract:
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PEIM to provide fake memory init
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**/
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//
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// The package level header files this module uses
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//
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#include <PiPei.h>
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//
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// The protocols, PPI and GUID defintions for this module
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//
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#include <Ppi/ArmMpCoreInfo.h>
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//
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// The Library classes this module consumes
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//
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#include <Library/DebugLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/PcdLib.h>
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#include <Library/HobLib.h>
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#include <Library/ArmLib.h>
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//
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// Module globals
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//
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#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
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#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
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EFI_STATUS
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FindMainMemory (
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OUT UINT32 *PhysicalBase,
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OUT UINT32 *Length
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)
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{
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EFI_PEI_HOB_POINTERS NextHob;
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// Look at the resource descriptor hobs, choose the first system memory one
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NextHob.Raw = GetHobList ();
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while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
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if(NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY)
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{
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*PhysicalBase = (UINT32)NextHob.ResourceDescriptor->PhysicalStart;
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*Length = (UINT32)NextHob.ResourceDescriptor->ResourceLength;
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return EFI_SUCCESS;
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}
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NextHob.Raw = GET_NEXT_HOB (NextHob);
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}
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return EFI_NOT_FOUND;
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}
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VOID
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ConfigureMmu (
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VOID
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)
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{
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EFI_STATUS Status;
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UINTN Idx;
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UINT32 CacheAttributes;
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UINT32 SystemMemoryBase;
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UINT32 SystemMemoryLength;
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UINT32 SystemMemoryLastAddress;
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ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[4];
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VOID *TranslationTableBase;
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UINTN TranslationTableSize;
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if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
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CacheAttributes = DDR_ATTRIBUTES_CACHED;
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} else {
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CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
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}
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Idx = 0;
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// Main Memory
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Status = FindMainMemory (&SystemMemoryBase, &SystemMemoryLength);
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ASSERT_EFI_ERROR (Status);
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SystemMemoryLastAddress = SystemMemoryBase + (SystemMemoryLength-1);
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// If system memory does not begin at 0
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if(SystemMemoryBase > 0) {
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MemoryTable[Idx].PhysicalBase = 0;
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MemoryTable[Idx].VirtualBase = 0;
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MemoryTable[Idx].Length = SystemMemoryBase;
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MemoryTable[Idx].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
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Idx++;
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}
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MemoryTable[Idx].PhysicalBase = SystemMemoryBase;
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MemoryTable[Idx].VirtualBase = SystemMemoryBase;
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MemoryTable[Idx].Length = SystemMemoryLength;
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MemoryTable[Idx].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
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Idx++;
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// If system memory does not go to the last address (0xFFFFFFFF)
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if( SystemMemoryLastAddress < MAX_ADDRESS ) {
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MemoryTable[Idx].PhysicalBase = SystemMemoryLastAddress + 1;
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MemoryTable[Idx].VirtualBase = MemoryTable[Idx].PhysicalBase;
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MemoryTable[Idx].Length = MAX_ADDRESS - MemoryTable[Idx].PhysicalBase + 1;
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MemoryTable[Idx].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
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Idx++;
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}
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// End of Table
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MemoryTable[Idx].PhysicalBase = 0;
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MemoryTable[Idx].VirtualBase = 0;
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MemoryTable[Idx].Length = 0;
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MemoryTable[Idx].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
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DEBUG ((EFI_D_INFO, "Enabling MMU, setting 0x%08x + %d MB to %a\n",
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SystemMemoryBase, SystemMemoryLength/1024/1024,
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(CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
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ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
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BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
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}
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/*++
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Routine Description:
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Arguments:
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FileHandle - Handle of the file being invoked.
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PeiServices - Describes the list of possible PEI Services.
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Returns:
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Status - EFI_SUCCESS if the boot mode could be set
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--*/
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EFI_STATUS
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EFIAPI
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InitializeCpuPeim (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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{
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EFI_STATUS Status;
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ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
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UINTN ArmCoreCount;
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ARM_CORE_INFO *ArmCoreInfoTable;
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// Enable program flow prediction, if supported.
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ArmEnableBranchPrediction ();
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// Publish the CPU memory and io spaces sizes
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BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
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//ConfigureMmu();
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// Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
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Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);
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if (!EFI_ERROR(Status)) {
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// Build the MP Core Info Table
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ArmCoreCount = 0;
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Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
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if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
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// Build MPCore Info HOB
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BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
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}
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}
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return EFI_SUCCESS;
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}
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