mirror of https://github.com/acidanthera/audk.git
146 lines
4.0 KiB
C
146 lines
4.0 KiB
C
/** @file
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This file contains the definination for host controller memory management routines
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Copyright (c) 2007, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _EFI_EHCI_MEM_H_
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#define _EFI_EHCI_MEM_H_
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#include <IndustryStandard/Pci22.h>
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#define USB_HC_BIT(a) ((UINTN)(1 << (a)))
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#define USB_HC_BIT_IS_SET(Data, Bit) \
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((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
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#define USB_HC_HIGH_32BIT(Addr64) \
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((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
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typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
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struct _USBHC_MEM_BLOCK {
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UINT8 *Bits; // Bit array to record which unit is allocated
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UINTN BitsLen;
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UINT8 *Buf;
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UINT8 *BufHost;
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UINTN BufLen; // Memory size in bytes
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VOID *Mapping;
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USBHC_MEM_BLOCK *Next;
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};
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//
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// USBHC_MEM_POOL is used to manage the memory used by USB
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// host controller. EHCI requires the control memory and transfer
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// data to be on the same 4G memory.
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//
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typedef struct _USBHC_MEM_POOL {
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EFI_PCI_IO_PROTOCOL *PciIo;
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BOOLEAN Check4G;
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UINT32 Which4G;
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USBHC_MEM_BLOCK *Head;
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} USBHC_MEM_POOL;
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typedef enum {
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USBHC_MEM_UNIT = 64, // Memory allocation unit, must be 2^n, n>4
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USBHC_MEM_UNIT_MASK = USBHC_MEM_UNIT - 1,
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USBHC_MEM_DEFAULT_PAGES = 16
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}UHCI_MEM_UNIT_DATA;
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#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))
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//
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// Advance the byte and bit to the next bit, adjust byte accordingly.
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//
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#define NEXT_BIT(Byte, Bit) \
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do { \
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(Bit)++; \
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if ((Bit) > 7) { \
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(Byte)++; \
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(Bit) = 0; \
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} \
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} while (0)
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/**
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Initialize the memory management pool for the host controller.
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@param PciIo The PciIo that can be used to access the host controller.
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@param Check4G Whether the host controller requires allocated memory
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from one 4G address space.
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@param Which4G The 4G memory area each memory allocated should be from.
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@retval EFI_SUCCESS The memory pool is initialized.
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@retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.
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**/
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USBHC_MEM_POOL *
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UsbHcInitMemPool (
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IN EFI_PCI_IO_PROTOCOL *PciIo,
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IN BOOLEAN Check4G,
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IN UINT32 Which4G
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);
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/**
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Release the memory management pool.
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@param Pool The USB memory pool to free.
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@return EFI_SUCCESS The memory pool is freed.
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@return EFI_DEVICE_ERROR Failed to free the memory pool.
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**/
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EFI_STATUS
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UsbHcFreeMemPool (
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IN USBHC_MEM_POOL *Pool
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);
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/**
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Allocate some memory from the host controller's memory pool
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which can be used to communicate with host controller.
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@param Pool The host controller's memory pool.
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@param Size Size of the memory to allocate.
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@return The allocated memory or NULL.
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**/
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VOID *
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UsbHcAllocateMem (
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IN USBHC_MEM_POOL *Pool,
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IN UINTN Size
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);
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/**
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Free the allocated memory back to the memory pool.
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@param Pool The memory pool of the host controller.
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@param Mem The memory to free.
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@param Size The size of the memory to free.
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@return None.
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**/
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VOID
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UsbHcFreeMem (
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IN USBHC_MEM_POOL *Pool,
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IN VOID *Mem,
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IN UINTN Size
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);
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#endif
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