mirror of https://github.com/acidanthera/audk.git
144 lines
4.7 KiB
ArmAsm
144 lines
4.7 KiB
ArmAsm
//
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// Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AutoGen.h>
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#include <AsmMacroIoLibV8.h>
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#include "SecInternal.h"
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.text
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.align 3
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
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GCC_ASM_IMPORT(ArmPlatformSecBootAction)
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GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
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GCC_ASM_IMPORT(ArmDisableInterrupts)
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GCC_ASM_IMPORT(ArmDisableCachesAndMmu)
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GCC_ASM_IMPORT(ArmReadMpidr)
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GCC_ASM_IMPORT(ArmCallWFE)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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StartupAddr: .8byte ASM_PFX(CEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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// NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
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// and configure the system accordingly. EL2 is default if possible.
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// If we started in EL3 we need to switch and run at EL2.
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// If we are running at EL2 stay in EL2
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// If we are starting at EL1 stay in EL1.
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// Sec only runs in EL3. Othewise we jump to PEI without changing anything.
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// If Sec runs we change to EL2 before switching to PEI.
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// Which EL are we running at? Every EL needs some level of setup...
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EL1_OR_EL2_OR_EL3(x0)
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1:// If we are at EL1 or EL2 leave SEC for PEI.
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2:b ASM_PFX(JumpToPEI)
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// If we are at EL3 we need to configure it and switch to EL2
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3:b ASM_PFX(MainEntryPoint)
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ASM_PFX(MainEntryPoint):
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// First ensure all interrupts are disabled
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bl ASM_PFX(ArmDisableInterrupts)
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// Ensure that the MMU and caches are off
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bl ASM_PFX(ArmDisableCachesAndMmu)
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// By default, we are doing a cold boot
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mov x10, #ARM_SEC_COLD_BOOT
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// Jump to Platform Specific Boot Action function
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bl ASM_PFX(ArmPlatformSecBootAction)
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_IdentifyCpu:
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// Identify CPU ID
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bl ASM_PFX(ArmReadMpidr)
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// Keep a copy of the MpId register value
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mov x5, x0
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// Is it the Primary Core ?
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bl ASM_PFX(ArmPlatformIsPrimaryCore)
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cmp x0, #1
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// Only the primary core initialize the memory (SMC)
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b.eq _InitMem
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_WaitInitMem:
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// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
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// Otherwise we have to wait the Primary Core to finish the initialization
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cmp x10, #ARM_SEC_COLD_BOOT
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b.ne _SetupSecondaryCoreStack
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// Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
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bl ASM_PFX(ArmCallWFE)
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// Now the Init Mem is initialized, we setup the secondary core stacks
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b _SetupSecondaryCoreStack
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_InitMem:
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// If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
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cmp x10, #ARM_SEC_COLD_BOOT
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b.ne _SetupPrimaryCoreStack
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// Initialize Init Boot Memory
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bl ASM_PFX(ArmPlatformSecBootMemoryInit)
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_SetupPrimaryCoreStack:
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), x1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
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add x1, x1, x2
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LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), x2)
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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SetPrimaryStack (x1, x2, x3, x4)
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b _PrepareArguments
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_SetupSecondaryCoreStack:
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), x1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), x2)
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add x6, x1, x2
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// Get the Core Position
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mov x0, x5
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bl ASM_PFX(ArmPlatformGetCorePosition)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add x0, x0, #1
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// StackOffset = CorePos * StackSize
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), x2)
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mul x0, x0, x2
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// SP = StackBase + StackOffset
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add sp, x6, x0
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_PrepareArguments:
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr x3, StartupAddr
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// Jump to SEC C code
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// r0 = mp_id
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// r1 = Boot Mode
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mov x0, x5
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mov x1, x10
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blr x3
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ret
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ASM_PFX(JumpToPEI):
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LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), x0)
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blr x0
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