mirror of https://github.com/acidanthera/audk.git
f2bc359ced
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405 Background as below. Problem: As static configuration from the PCDs, the binary PeiCore (for example in FSP binary with dispatch mode) could not predict how many FVs, Files or PPIs for different platforms. Burden: Platform developers need configure the PCDs accordingly for different platforms. To solve the problem and remove the burden, we can update code to remove the using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI management. This patch removes the using of PcdPeiCoreMaxPpiSupported in PeiCore. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> |
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| .. | ||
| BootMode | ||
| CpuIo | ||
| Dependency | ||
| Dispatcher | ||
| FwVol | ||
| Hob | ||
| Image | ||
| Memory | ||
| PciCfg2 | ||
| PeiMain | ||
| Ppi | ||
| Reset | ||
| Security | ||
| StatusCode | ||
| PeiCore.uni | ||
| PeiCoreExtra.uni | ||
| PeiMain.h | ||
| PeiMain.inf | ||