mirror of https://github.com/acidanthera/audk.git
67 lines
1.9 KiB
C
67 lines
1.9 KiB
C
/** @file
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Base Library CPU functions for Itanium
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Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/PalLib.h>
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#include <Library/BaseLib.h>
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/**
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Places the CPU in a sleep state until an interrupt is received.
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Places the CPU in a sleep state until an interrupt is received. If interrupts
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are disabled prior to calling this function, then the CPU will be placed in a
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sleep state indefinitely.
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**/
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VOID
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EFIAPI
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CpuSleep (
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VOID
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)
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{
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UINT64 Tpr;
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//
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// It is the TPR register that controls if external interrupt would bring processor in LIGHT HALT low-power state
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// back to normal state. PAL_HALT_LIGHT does not depend on PSR setting.
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// So here if interrupts are disabled (via PSR.i), TRP.mmi needs to be set to prevent processor being interrupted by external interrupts.
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// If interrupts are enabled, then just use current TRP setting.
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//
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if (GetInterruptState ()) {
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//
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// If interrupts are enabled, then call PAL_HALT_LIGHT with the current TPR setting.
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//
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PalCall (PAL_HALT_LIGHT, 0, 0, 0);
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} else {
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//
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// If interrupts are disabled on entry, then mask all interrupts in TPR before calling PAL_HALT_LIGHT.
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//
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//
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// Save TPR
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//
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Tpr = AsmReadTpr();
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//
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// Set TPR.mmi to mask all external interrupts
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//
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AsmWriteTpr (BIT16 | Tpr);
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PalCall (PAL_HALT_LIGHT, 0, 0, 0);
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//
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// Restore TPR
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//
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AsmWriteTpr (Tpr);
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}
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}
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