mirror of https://github.com/acidanthera/audk.git
208 lines
5.7 KiB
C
208 lines
5.7 KiB
C
/** @file
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Stateful and implicitly initialized fw_cfg library implementation.
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Copyright (C) 2013, Red Hat, Inc.
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Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available
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under the terms and conditions of the BSD License which accompanies this
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distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
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WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/BaseLib.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <Library/QemuFwCfgLib.h>
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#include <Library/MemEncryptSevLib.h>
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#include "QemuFwCfgLibInternal.h"
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STATIC BOOLEAN mQemuFwCfgSupported = FALSE;
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STATIC BOOLEAN mQemuFwCfgDmaSupported;
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/**
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Returns a boolean indicating if the firmware configuration interface
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is available or not.
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This function may change fw_cfg state.
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@retval TRUE The interface is available
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@retval FALSE The interface is not available
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**/
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BOOLEAN
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EFIAPI
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QemuFwCfgIsAvailable (
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VOID
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)
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{
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return InternalQemuFwCfgIsAvailable ();
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}
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RETURN_STATUS
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EFIAPI
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QemuFwCfgInitialize (
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VOID
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)
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{
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UINT32 Signature;
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UINT32 Revision;
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//
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// Enable the access routines while probing to see if it is supported.
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// For probing we always use the IO Port (IoReadFifo8()) access method.
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//
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mQemuFwCfgSupported = TRUE;
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mQemuFwCfgDmaSupported = FALSE;
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QemuFwCfgSelectItem (QemuFwCfgItemSignature);
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Signature = QemuFwCfgRead32 ();
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DEBUG ((EFI_D_INFO, "FW CFG Signature: 0x%x\n", Signature));
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QemuFwCfgSelectItem (QemuFwCfgItemInterfaceVersion);
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Revision = QemuFwCfgRead32 ();
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DEBUG ((EFI_D_INFO, "FW CFG Revision: 0x%x\n", Revision));
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if ((Signature != SIGNATURE_32 ('Q', 'E', 'M', 'U')) ||
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(Revision < 1)
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) {
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DEBUG ((EFI_D_INFO, "QemuFwCfg interface not supported.\n"));
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mQemuFwCfgSupported = FALSE;
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return RETURN_SUCCESS;
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}
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if ((Revision & FW_CFG_F_DMA) == 0) {
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DEBUG ((DEBUG_INFO, "QemuFwCfg interface (IO Port) is supported.\n"));
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} else {
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//
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// If SEV is enabled then we do not support DMA operations in PEI phase.
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// This is mainly because DMA in SEV guest requires using bounce buffer
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// (which need to allocate dynamic memory and allocating a PAGE size'd
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// buffer can be challenge in PEI phase)
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//
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if (MemEncryptSevIsEnabled ()) {
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DEBUG ((DEBUG_INFO, "SEV: QemuFwCfg fallback to IO Port interface.\n"));
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} else {
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mQemuFwCfgDmaSupported = TRUE;
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DEBUG ((DEBUG_INFO, "QemuFwCfg interface (DMA) is supported.\n"));
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}
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}
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return RETURN_SUCCESS;
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}
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/**
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Returns a boolean indicating if the firmware configuration interface is
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available for library-internal purposes.
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This function never changes fw_cfg state.
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@retval TRUE The interface is available internally.
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@retval FALSE The interface is not available internally.
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**/
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BOOLEAN
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InternalQemuFwCfgIsAvailable (
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VOID
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)
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{
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return mQemuFwCfgSupported;
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}
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/**
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Returns a boolean indicating whether QEMU provides the DMA-like access method
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for fw_cfg.
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@retval TRUE The DMA-like access method is available.
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@retval FALSE The DMA-like access method is unavailable.
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**/
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BOOLEAN
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InternalQemuFwCfgDmaIsAvailable (
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VOID
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)
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{
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return mQemuFwCfgDmaSupported;
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}
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/**
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Transfer an array of bytes, or skip a number of bytes, using the DMA
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interface.
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@param[in] Size Size in bytes to transfer or skip.
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@param[in,out] Buffer Buffer to read data into or write data from. Ignored,
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and may be NULL, if Size is zero, or Control is
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FW_CFG_DMA_CTL_SKIP.
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@param[in] Control One of the following:
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FW_CFG_DMA_CTL_WRITE - write to fw_cfg from Buffer.
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FW_CFG_DMA_CTL_READ - read from fw_cfg into Buffer.
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FW_CFG_DMA_CTL_SKIP - skip bytes in fw_cfg.
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**/
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VOID
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InternalQemuFwCfgDmaBytes (
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IN UINT32 Size,
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IN OUT VOID *Buffer OPTIONAL,
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IN UINT32 Control
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)
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{
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volatile FW_CFG_DMA_ACCESS Access;
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UINT32 AccessHigh, AccessLow;
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UINT32 Status;
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ASSERT (Control == FW_CFG_DMA_CTL_WRITE || Control == FW_CFG_DMA_CTL_READ ||
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Control == FW_CFG_DMA_CTL_SKIP);
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if (Size == 0) {
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return;
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}
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//
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// SEV does not support DMA operations in PEI stage, we should
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// not have reached here.
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//
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ASSERT (!MemEncryptSevIsEnabled ());
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Access.Control = SwapBytes32 (Control);
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Access.Length = SwapBytes32 (Size);
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Access.Address = SwapBytes64 ((UINTN)Buffer);
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//
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// Delimit the transfer from (a) modifications to Access, (b) in case of a
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// write, from writes to Buffer by the caller.
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//
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MemoryFence ();
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//
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// Start the transfer.
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//
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AccessHigh = (UINT32)RShiftU64 ((UINTN)&Access, 32);
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AccessLow = (UINT32)(UINTN)&Access;
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IoWrite32 (FW_CFG_IO_DMA_ADDRESS, SwapBytes32 (AccessHigh));
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IoWrite32 (FW_CFG_IO_DMA_ADDRESS + 4, SwapBytes32 (AccessLow));
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//
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// Don't look at Access.Control before starting the transfer.
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//
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MemoryFence ();
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//
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// Wait for the transfer to complete.
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//
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do {
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Status = SwapBytes32 (Access.Control);
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ASSERT ((Status & FW_CFG_DMA_CTL_ERROR) == 0);
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} while (Status != 0);
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//
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// After a read, the caller will want to use Buffer.
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//
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MemoryFence ();
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}
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