mirror of https://github.com/acidanthera/audk.git
133 lines
3.5 KiB
NASM
133 lines
3.5 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; Serial port debug support macros
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;
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; Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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;//---------------------------------------------
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;// UART Register Offsets
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;//---------------------------------------------
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%define BAUD_LOW_OFFSET 0x00
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%define BAUD_HIGH_OFFSET 0x01
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%define IER_OFFSET 0x01
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%define LCR_SHADOW_OFFSET 0x01
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%define FCR_SHADOW_OFFSET 0x02
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%define IR_CONTROL_OFFSET 0x02
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%define FCR_OFFSET 0x02
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%define EIR_OFFSET 0x02
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%define BSR_OFFSET 0x03
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%define LCR_OFFSET 0x03
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%define MCR_OFFSET 0x04
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%define LSR_OFFSET 0x05
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%define MSR_OFFSET 0x06
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;//---------------------------------------------
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;// UART Register Bit Defines
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;//---------------------------------------------
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%define LSR_TXRDY 0x20
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%define LSR_RXDA 0x01
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%define DLAB 0x01
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; UINT16 gComBase = 0x3f8;
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; UINTN gBps = 115200;
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; UINT8 gData = 8;
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; UINT8 gStop = 1;
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; UINT8 gParity = 0;
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; UINT8 gBreakSet = 0;
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%define DEFAULT_COM_BASE 0x3f8
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%define DEFAULT_BPS 115200
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%define DEFAULT_DATA 8
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%define DEFAULT_STOP 1
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%define DEFAULT_PARITY 0
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%define DEFAULT_BREAK_SET 0
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%define SERIAL_DEFAULT_LCR ( \
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(DEFAULT_BREAK_SET << 6) | \
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(DEFAULT_PARITY << 3) | \
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(DEFAULT_STOP << 2) | \
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(DEFAULT_DATA - 5) \
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)
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%define SERIAL_PORT_IO_BASE_ADDRESS DEFAULT_COM_BASE
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%macro inFromSerialPort 1
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mov dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)
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in al, dx
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%endmacro
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%macro waitForSerialTxReady 0
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%%waitingForTx:
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inFromSerialPort LSR_OFFSET
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test al, LSR_TXRDY
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jz %%waitingForTx
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%endmacro
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%macro outToSerialPort 2
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mov dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)
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mov al, %2
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out dx, al
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%endmacro
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%macro debugShowCharacter 1
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waitForSerialTxReady
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outToSerialPort 0, %1
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%endmacro
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%macro debugShowHexDigit 1
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%if (%1 < 0xa)
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debugShowCharacter BYTE ('0' + (%1))
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%else
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debugShowCharacter BYTE ('a' + ((%1) - 0xa))
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%endif
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%endmacro
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%macro debugNewline 0
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debugShowCharacter `\r`
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debugShowCharacter `\n`
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%endmacro
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%macro debugShowPostCode 1
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debugShowHexDigit (((%1) >> 4) & 0xf)
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debugShowHexDigit ((%1) & 0xf)
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debugNewline
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%endmacro
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BITS 16
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%macro debugInitialize 0
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jmp real16InitDebug
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real16InitDebugReturn:
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%endmacro
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real16InitDebug:
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;
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; Set communications format
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;
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outToSerialPort LCR_OFFSET, ((DLAB << 7) | SERIAL_DEFAULT_LCR)
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;
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; Configure baud rate
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;
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outToSerialPort BAUD_HIGH_OFFSET, ((115200 / DEFAULT_BPS) >> 8)
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outToSerialPort BAUD_LOW_OFFSET, ((115200 / DEFAULT_BPS) & 0xff)
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;
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; Switch back to bank 0
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;
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outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR
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jmp real16InitDebugReturn
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