mirror of https://github.com/acidanthera/audk.git
519 lines
20 KiB
C
519 lines
20 KiB
C
/*++
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Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
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Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2013-2021, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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--*/
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#include <Library/MemoryAllocationLib.h>
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#include "CpuDxe.h"
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EFI_STATUS
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SectionToGcdAttributes (
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IN UINT32 SectionAttributes,
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OUT UINT64 *GcdAttributes
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)
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{
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*GcdAttributes = 0;
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// determine cacheability attributes
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switch (SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) {
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED:
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*GcdAttributes |= EFI_MEMORY_UC;
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break;
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE:
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*GcdAttributes |= EFI_MEMORY_UC;
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break;
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
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*GcdAttributes |= EFI_MEMORY_WT;
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break;
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
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*GcdAttributes |= EFI_MEMORY_WB;
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break;
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE:
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*GcdAttributes |= EFI_MEMORY_WC;
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break;
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC:
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*GcdAttributes |= EFI_MEMORY_WB;
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break;
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case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE:
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*GcdAttributes |= EFI_MEMORY_UC;
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break;
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default:
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return EFI_UNSUPPORTED;
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}
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// determine protection attributes
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switch (SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) {
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case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write
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// *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
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break;
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case TT_DESCRIPTOR_SECTION_AP_RW_NO:
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case TT_DESCRIPTOR_SECTION_AP_RW_RW:
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// normal read/write access, do not add additional attributes
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break;
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// read only cases map to write-protect
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case TT_DESCRIPTOR_SECTION_AP_RO_NO:
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case TT_DESCRIPTOR_SECTION_AP_RO_RO:
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*GcdAttributes |= EFI_MEMORY_RO;
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break;
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default:
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return EFI_UNSUPPORTED;
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}
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// now process eXectue Never attribute
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if ((SectionAttributes & TT_DESCRIPTOR_SECTION_XN_MASK) != 0 ) {
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*GcdAttributes |= EFI_MEMORY_XP;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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PageToGcdAttributes (
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IN UINT32 PageAttributes,
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OUT UINT64 *GcdAttributes
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)
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{
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*GcdAttributes = 0;
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// determine cacheability attributes
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switch (PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) {
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED:
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*GcdAttributes |= EFI_MEMORY_UC;
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break;
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE:
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*GcdAttributes |= EFI_MEMORY_UC;
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break;
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC:
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*GcdAttributes |= EFI_MEMORY_WT;
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break;
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC:
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*GcdAttributes |= EFI_MEMORY_WB;
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break;
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE:
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*GcdAttributes |= EFI_MEMORY_WC;
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break;
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC:
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*GcdAttributes |= EFI_MEMORY_WB;
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break;
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case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE:
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*GcdAttributes |= EFI_MEMORY_UC;
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break;
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default:
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return EFI_UNSUPPORTED;
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}
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// determine protection attributes
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switch (PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) {
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case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write
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// *GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP;
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break;
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case TT_DESCRIPTOR_PAGE_AP_RW_NO:
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case TT_DESCRIPTOR_PAGE_AP_RW_RW:
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// normal read/write access, do not add additional attributes
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break;
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// read only cases map to write-protect
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case TT_DESCRIPTOR_PAGE_AP_RO_NO:
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case TT_DESCRIPTOR_PAGE_AP_RO_RO:
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*GcdAttributes |= EFI_MEMORY_RO;
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break;
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default:
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return EFI_UNSUPPORTED;
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}
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// now process eXectue Never attribute
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if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) {
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*GcdAttributes |= EFI_MEMORY_XP;
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}
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return EFI_SUCCESS;
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}
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EFI_STATUS
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SyncCacheConfigPage (
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IN UINT32 SectionIndex,
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IN UINT32 FirstLevelDescriptor,
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IN UINTN NumberOfDescriptors,
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IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
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IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase,
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IN OUT UINT64 *NextRegionLength,
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IN OUT UINT32 *NextSectionAttributes
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)
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{
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EFI_STATUS Status;
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UINT32 i;
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volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable;
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UINT32 NextPageAttributes;
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UINT32 PageAttributes;
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UINT32 BaseAddress;
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UINT64 GcdAttributes;
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// Get the Base Address from FirstLevelDescriptor;
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BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS (SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
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// Convert SectionAttributes into PageAttributes
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NextPageAttributes =
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TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (*NextSectionAttributes, 0) |
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TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (*NextSectionAttributes);
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// obtain page table base
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SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
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for (i = 0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) {
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if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
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// extract attributes (cacheability and permissions)
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PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK);
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if (NextPageAttributes == 0) {
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// start on a new region
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*NextRegionLength = 0;
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*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
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NextPageAttributes = PageAttributes;
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} else if (PageAttributes != NextPageAttributes) {
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// Convert Section Attributes into GCD Attributes
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Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
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ASSERT_EFI_ERROR (Status);
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// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
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SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
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// start on a new region
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*NextRegionLength = 0;
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*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
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NextPageAttributes = PageAttributes;
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}
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} else if (NextPageAttributes != 0) {
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// Convert Page Attributes into GCD Attributes
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Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes);
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ASSERT_EFI_ERROR (Status);
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// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
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SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes);
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*NextRegionLength = 0;
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*NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT);
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NextPageAttributes = 0;
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}
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*NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE;
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}
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// Convert back PageAttributes into SectionAttributes
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*NextSectionAttributes =
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TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (NextPageAttributes, 0) |
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TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (NextPageAttributes);
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return EFI_SUCCESS;
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}
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EFI_STATUS
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SyncCacheConfig (
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IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol
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)
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{
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EFI_STATUS Status;
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UINT32 i;
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EFI_PHYSICAL_ADDRESS NextRegionBase;
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UINT64 NextRegionLength;
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UINT32 NextSectionAttributes;
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UINT32 SectionAttributes;
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UINT64 GcdAttributes;
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volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
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UINTN NumberOfDescriptors;
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EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
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DEBUG ((DEBUG_PAGE, "SyncCacheConfig()\n"));
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// This code assumes MMU is enabled and filed with section translations
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ASSERT (ArmMmuEnabled ());
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//
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// Get the memory space map from GCD
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//
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MemorySpaceMap = NULL;
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Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);
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ASSERT_EFI_ERROR (Status);
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// The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs
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// to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a
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// GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were
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// a client) to update its copy of the attributes. This is bad architecture and should be replaced
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// with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.
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// obtain page table base
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FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)(ArmGetTTBR0BaseAddress ());
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// Get the first region
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NextSectionAttributes = FirstLevelTable[0] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
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// iterate through each 1MB descriptor
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NextRegionBase = NextRegionLength = 0;
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for (i = 0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) {
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if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) {
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// extract attributes (cacheability and permissions)
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SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK);
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if (NextSectionAttributes == 0) {
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// start on a new region
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NextRegionLength = 0;
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NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
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NextSectionAttributes = SectionAttributes;
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} else if (SectionAttributes != NextSectionAttributes) {
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// Convert Section Attributes into GCD Attributes
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Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
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ASSERT_EFI_ERROR (Status);
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// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
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SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
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// start on a new region
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NextRegionLength = 0;
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NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
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NextSectionAttributes = SectionAttributes;
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}
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NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
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} else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (FirstLevelTable[i])) {
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// In this case any bits set in the 'NextSectionAttributes' are garbage and were set from
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// bits that are actually part of the pagetable address. We clear it out to zero so that
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// the SyncCacheConfigPage will use the page attributes instead of trying to convert the
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// section attributes into page attributes
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NextSectionAttributes = 0;
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Status = SyncCacheConfigPage (
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i,
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FirstLevelTable[i],
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NumberOfDescriptors,
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MemorySpaceMap,
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&NextRegionBase,
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&NextRegionLength,
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&NextSectionAttributes
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);
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ASSERT_EFI_ERROR (Status);
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} else {
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// We do not support yet 16MB sections
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ASSERT ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) != TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION);
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// start on a new region
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if (NextSectionAttributes != 0) {
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// Convert Section Attributes into GCD Attributes
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Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
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ASSERT_EFI_ERROR (Status);
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// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
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SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
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NextRegionLength = 0;
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NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (i << TT_DESCRIPTOR_SECTION_BASE_SHIFT);
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NextSectionAttributes = 0;
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}
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NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE;
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}
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} // section entry loop
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if (NextSectionAttributes != 0) {
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// Convert Section Attributes into GCD Attributes
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Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes);
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ASSERT_EFI_ERROR (Status);
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// update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK)
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SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes);
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}
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FreePool (MemorySpaceMap);
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return EFI_SUCCESS;
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}
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UINT64
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EfiAttributeToArmAttribute (
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IN UINT64 EfiAttributes
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)
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{
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UINT64 ArmAttributes;
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switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) {
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case EFI_MEMORY_UC:
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// Map to strongly ordered
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0
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break;
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case EFI_MEMORY_WC:
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// Map to normal non-cacheable
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0
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break;
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case EFI_MEMORY_WT:
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// Write through with no-allocate
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0
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break;
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case EFI_MEMORY_WB:
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// Write back (with allocate)
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ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1
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break;
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case EFI_MEMORY_UCE:
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default:
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ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT;
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break;
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}
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// Determine protection attributes
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if ((EfiAttributes & EFI_MEMORY_RO) != 0) {
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ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO;
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} else {
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ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW;
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}
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// Determine eXecute Never attribute
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if ((EfiAttributes & EFI_MEMORY_XP) != 0) {
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ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
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}
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return ArmAttributes;
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}
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EFI_STATUS
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GetMemoryRegionPage (
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IN UINT32 *PageTable,
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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)
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{
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UINT32 PageAttributes;
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UINT32 TableIndex;
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UINT32 PageDescriptor;
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// Convert the section attributes into page attributes
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PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0);
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// Calculate index into first level translation table for start of modification
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TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
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ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT);
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// Go through the page table to find the end of the section
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for ( ; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) {
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// Get the section at the given index
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PageDescriptor = PageTable[TableIndex];
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if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) {
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// Case: End of the boundary of the region
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return EFI_SUCCESS;
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} else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) {
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if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) {
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*RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE;
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} else {
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// Case: End of the boundary of the region
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return EFI_SUCCESS;
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}
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} else {
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// We do not support Large Page yet. We return EFI_SUCCESS that means end of the region.
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ASSERT (0);
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return EFI_SUCCESS;
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}
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}
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return EFI_NOT_FOUND;
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}
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EFI_STATUS
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GetMemoryRegion (
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IN OUT UINTN *BaseAddress,
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OUT UINTN *RegionLength,
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OUT UINTN *RegionAttributes
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)
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{
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EFI_STATUS Status;
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UINT32 TableIndex;
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UINT32 PageAttributes;
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UINT32 PageTableIndex;
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UINT32 SectionDescriptor;
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ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
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UINT32 *PageTable;
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// Initialize the arguments
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*RegionLength = 0;
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// Obtain page table base
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FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress ();
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// Calculate index into first level translation table for start of modification
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TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT;
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ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT);
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// Get the section at the given index
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SectionDescriptor = FirstLevelTable[TableIndex];
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if (!SectionDescriptor) {
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return EFI_NOT_FOUND;
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}
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// If 'BaseAddress' belongs to the section then round it to the section boundary
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if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
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((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
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{
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*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
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*RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK;
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} else {
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// Otherwise, we round it to the page boundary
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*BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK;
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// Get the attribute at the page table level (Level 2)
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PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
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// Calculate index into first level translation table for start of modification
|
|
PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT;
|
|
ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT);
|
|
|
|
PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK;
|
|
*RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) |
|
|
TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes);
|
|
}
|
|
|
|
for ( ; TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) {
|
|
// Get the section at the given index
|
|
SectionDescriptor = FirstLevelTable[TableIndex];
|
|
|
|
// If the entry is a level-2 page table then we scan it to find the end of the region
|
|
if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) {
|
|
// Extract the page table location from the descriptor
|
|
PageTable = (UINT32 *)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK);
|
|
|
|
// Scan the page table to find the end of the region.
|
|
Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes);
|
|
|
|
// If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop
|
|
if (Status == EFI_SUCCESS) {
|
|
break;
|
|
}
|
|
} else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) ||
|
|
((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION))
|
|
{
|
|
if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) {
|
|
// If the attributes of the section differ from the one targeted then we exit the loop
|
|
break;
|
|
} else {
|
|
*RegionLength = *RegionLength + TT_DESCRIPTOR_SECTION_SIZE;
|
|
}
|
|
} else {
|
|
// If we are on an invalid section then it means it is the end of our section.
|
|
break;
|
|
}
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|