mirror of https://github.com/acidanthera/audk.git
120 lines
3.8 KiB
ArmAsm
120 lines
3.8 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT (ArmReadCntFrq)
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GCC_ASM_EXPORT (ArmWriteCntFrq)
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GCC_ASM_EXPORT (ArmReadCntPct)
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GCC_ASM_EXPORT (ArmReadCntkCtl)
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GCC_ASM_EXPORT (ArmWriteCntkCtl)
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GCC_ASM_EXPORT (ArmReadCntpTval)
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GCC_ASM_EXPORT (ArmWriteCntpTval)
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GCC_ASM_EXPORT (ArmReadCntpCtl)
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GCC_ASM_EXPORT (ArmWriteCntpCtl)
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GCC_ASM_EXPORT (ArmReadCntvTval)
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GCC_ASM_EXPORT (ArmWriteCntvTval)
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GCC_ASM_EXPORT (ArmReadCntvCtl)
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GCC_ASM_EXPORT (ArmWriteCntvCtl)
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GCC_ASM_EXPORT (ArmReadCntvCt)
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GCC_ASM_EXPORT (ArmReadCntpCval)
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GCC_ASM_EXPORT (ArmWriteCntpCval)
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GCC_ASM_EXPORT (ArmReadCntvCval)
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GCC_ASM_EXPORT (ArmWriteCntvCval)
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GCC_ASM_EXPORT (ArmReadCntvOff)
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GCC_ASM_EXPORT (ArmWriteCntvOff)
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ASM_PFX(ArmReadCntFrq):
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mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ
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bx lr
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ASM_PFX(ArmWriteCntFrq):
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mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
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bx lr
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ASM_PFX(ArmReadCntPct):
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mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)
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bx lr
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ASM_PFX(ArmReadCntkCtl):
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mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)
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bx lr
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ASM_PFX(ArmWriteCntkCtl):
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mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
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bx lr
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ASM_PFX(ArmReadCntpTval):
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mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)
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bx lr
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ASM_PFX(ArmWriteCntpTval):
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mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
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bx lr
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ASM_PFX(ArmReadCntpCtl):
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mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)
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bx lr
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ASM_PFX(ArmWriteCntpCtl):
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mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
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bx lr
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ASM_PFX(ArmReadCntvTval):
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mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)
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bx lr
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ASM_PFX(ArmWriteCntvTval):
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mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
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bx lr
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ASM_PFX(ArmReadCntvCtl):
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mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)
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bx lr
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ASM_PFX(ArmWriteCntvCtl):
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mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
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bx lr
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ASM_PFX(ArmReadCntvCt):
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mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)
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bx lr
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ASM_PFX(ArmReadCntpCval):
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mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
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bx lr
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ASM_PFX(ArmWriteCntpCval):
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mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
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bx lr
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ASM_PFX(ArmReadCntvCval):
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mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
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bx lr
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ASM_PFX(ArmWriteCntvCval):
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mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)
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bx lr
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ASM_PFX(ArmReadCntvOff):
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mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)
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bx lr
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ASM_PFX(ArmWriteCntvOff):
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mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
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bx lr
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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