mirror of https://github.com/acidanthera/audk.git
28b020b5de
If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory. The page table size depend on 2 things: 1) The 1G paging capability. 2) The whole system memory/MMIO addressing capability. A) If the system only supports 2M paging, When the whole memory/MMIO is 32bit, we only need 1+1+4=6 pages for 4G. When the whole memory/MMIO is 39bit, we need 1+1+256 pages (~ 1M) When the whole memory/MMIO is 48bit, we need 1+256+256*256 pages (~ 257M) B) If the system supports 1G paging. When the whole memory/MMIO is 32bit, we only need 1+1+4=6 pages for 4G. (We still generate 2M page for maintenance consideration.) When the whole memory/MMIO is 39bit, we still need 6 pages. (We setup 1G paging for >1G.) When the whole memory/MMIO is 48bit, we need 1+256 pages (~ 1M). Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> |
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.. | ||
Application/Cpuid | ||
CpuDxe | ||
CpuIo2Dxe | ||
CpuIo2Smm | ||
CpuIoPei | ||
CpuMpPei | ||
CpuS3DataDxe | ||
Feature/Capsule | ||
Include | ||
Library | ||
PiSmmCommunication | ||
PiSmmCpuDxeSmm | ||
ResetVector | ||
SecCore | ||
Universal/Acpi/S3Resume2Pei | ||
Contributions.txt | ||
License.txt | ||
UefiCpuPkg.dec | ||
UefiCpuPkg.dsc | ||
UefiCpuPkg.uni | ||
UefiCpuPkgExtra.uni |