mirror of https://github.com/acidanthera/audk.git
248 lines
7.8 KiB
C
248 lines
7.8 KiB
C
/** @file
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*
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* Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
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* Copyright (c) 2012 - 2022, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-2-Clause-Patent
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*
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* @par Revision Reference:
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* - [1] SMC Calling Convention version 1.2
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* (https://developer.arm.com/documentation/den0028/c/?lang=en)
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* - [2] Arm True Random Number Generator Firmware, Interface 1.0,
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* Platform Design Document.
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* (https://developer.arm.com/documentation/den0098/latest/)
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*
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* @par Glossary:
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* - TRNG - True Random Number Generator
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*
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**/
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#ifndef ARM_STD_SMC_H_
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#define ARM_STD_SMC_H_
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/*
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* SMC function IDs for Standard Service queries
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*/
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#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
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#define ARM_SMC_ID_STD_UID 0x8400ff01
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/* 0x8400ff02 is reserved */
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#define ARM_SMC_ID_STD_REVISION 0x8400ff03
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/*
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* The 'Standard Service Call UID' is supposed to return the Standard
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* Service UUID. This is a 128-bit value.
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*/
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#define ARM_SMC_STD_UUID0 0x108d905b
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#define ARM_SMC_STD_UUID1 0x47e8f863
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#define ARM_SMC_STD_UUID2 0xfbc02dae
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#define ARM_SMC_STD_UUID3 0xe2f64156
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/*
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* ARM Standard Service Calls revision numbers
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* The current revision is: 0.1
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*/
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#define ARM_SMC_STD_REVISION_MAJOR 0x0
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#define ARM_SMC_STD_REVISION_MINOR 0x1
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/*
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* Management Mode (MM) calls cover a subset of the Standard Service Call range.
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* The list below is not exhaustive.
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*/
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#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
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#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
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// Request service from secure standalone MM environment
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#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
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#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
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/* Generic ID when using AArch32 or AArch64 execution state */
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#ifdef MDE_CPU_AARCH64
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#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH64
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#endif
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#ifdef MDE_CPU_ARM
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#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH32
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#endif
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/* MM return error codes */
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#define ARM_SMC_MM_RET_SUCCESS 0
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#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
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#define ARM_SMC_MM_RET_INVALID_PARAMS -2
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#define ARM_SMC_MM_RET_DENIED -3
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#define ARM_SMC_MM_RET_NO_MEMORY -4
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// ARM Architecture Calls
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#define SMCCC_VERSION 0x80000000
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#define SMCCC_ARCH_FEATURES 0x80000001
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#define SMCCC_ARCH_SOC_ID 0x80000002
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#define SMCCC_ARCH_WORKAROUND_1 0x80008000
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#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
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#define SMC_ARCH_CALL_SUCCESS 0
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#define SMC_ARCH_CALL_NOT_SUPPORTED -1
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#define SMC_ARCH_CALL_NOT_REQUIRED -2
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#define SMC_ARCH_CALL_INVALID_PARAMETER -3
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/*
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* Power State Coordination Interface (PSCI) calls cover a subset of the
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* Standard Service Call range.
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* The list below is not exhaustive.
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*/
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#define ARM_SMC_ID_PSCI_VERSION 0x84000000
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#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001
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#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001
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#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002
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#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003
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#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004
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#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005
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#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005
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#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008
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#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009
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#define ARM_SMC_ID_PSCI_FEATURES 0x8400000A
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#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xC4000012
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/* The current PSCI version is: 0.2 */
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#define ARM_SMC_PSCI_VERSION_MAJOR 0
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#define ARM_SMC_PSCI_VERSION_MINOR 2
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#define ARM_SMC_PSCI_VERSION \
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((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
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/* PSCI return error codes */
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#define ARM_SMC_PSCI_RET_SUCCESS 0
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#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
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#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
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#define ARM_SMC_PSCI_RET_DENIED -3
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#define ARM_SMC_PSCI_RET_ALREADY_ON -4
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#define ARM_SMC_PSCI_RET_ON_PENDING -5
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#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
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#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
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#define ARM_SMC_PSCI_RET_DISABLED -8
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#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
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((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
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#define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \
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((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
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#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)
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#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2
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/*
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* SMC function IDs for Trusted OS Service queries
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*/
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#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00
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#define ARM_SMC_ID_TOS_UID 0xbf00ff01
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/* 0xbf00ff02 is reserved */
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#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03
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// Firmware TRNG interface Function IDs
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/*
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SMC/HVC call to get the version of the TRNG backend,
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Cf. [2], 2.1 TRNG_VERSION
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Input values:
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W0 0x8400_0050
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W1-W7 Reserved (MBZ)
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Return values:
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Success (W0 > 0) W0[31] MBZ
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W0[30:16] Major revision
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W0[15:0] Minor revision
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W1 - W3 Reserved (MBZ)
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Error (W0 < 0)
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NOT_SUPPORTED Function not implemented
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*/
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#define ARM_SMC_ID_TRNG_VERSION 0x84000050
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/*
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SMC/HVC call to check if a TRNG function ID is implemented by the backend,
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Cf. [2], Section 2.2 TRNG_FEATURES
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Input Values
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W0 0x8400_0051
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W1 trng_func_id
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W2-W7 Reserved (MBZ)
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Return values:
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Success (W0 >= 0):
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SUCCESS Function is implemented.
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> 0 Function is implemented and
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has specific capabilities,
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see function definition.
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Error (W0 < 0)
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NOT_SUPPORTED Function with FID=trng_func_id
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is not implemented
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*/
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#define ARM_SMC_ID_TRNG_FEATURES 0x84000051
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/*
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SMC/HVC call to get the UUID of the TRNG backend,
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Cf. [2], Section 2.3 TRNG_GET_UUID
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Input Values:
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W0 0x8400_0052
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W1-W7 Reserved (MBZ)
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Return Values:
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Success (W0 != -1)
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W0 UUID[31:0]
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W1 UUID[63:32]
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W2 UUID[95:64]
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W3 UUID[127:96]
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Error (W0 = -1)
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W0 NOT_SUPPORTED
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*/
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#define ARM_SMC_ID_TRNG_GET_UUID 0x84000052
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/*
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AARCH32 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.
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Input values:
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W0 0x8400_0053
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W2-W7 Reserved (MBZ)
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Return values:
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Success (W0 = 0):
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W0 MBZ
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W1 Entropy[95:64]
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W2 Entropy[63:32]
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W3 Entropy[31:0]
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Error (W0 < 0)
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W0 NOT_SUPPORTED
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NO_ENTROPY
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INVALID_PARAMETERS
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W1 - W3 Reserved (MBZ)
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*/
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#define ARM_SMC_ID_TRNG_RND_AARCH32 0x84000053
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/*
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AARCH64 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.
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Input values:
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X0 0xC400_0053
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X2-X7 Reserved (MBZ)
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Return values:
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Success (X0 = 0):
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X0 MBZ
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X1 Entropy[191:128]
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X2 Entropy[127:64]
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X3 Entropy[63:0]
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Error (X0 < 0)
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X0 NOT_SUPPORTED
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NO_ENTROPY
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INVALID_PARAMETERS
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X1 - X3 Reserved (MBZ)
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*/
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#define ARM_SMC_ID_TRNG_RND_AARCH64 0xC4000053
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// Firmware TRNG status codes
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#define TRNG_STATUS_SUCCESS (INT32)(0)
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#define TRNG_STATUS_NOT_SUPPORTED (INT32)(-1)
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#define TRNG_STATUS_INVALID_PARAMETER (INT32)(-2)
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#define TRNG_STATUS_NO_ENTROPY (INT32)(-3)
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#endif // ARM_STD_SMC_H_
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