mirror of https://github.com/acidanthera/audk.git
115 lines
4.3 KiB
C
115 lines
4.3 KiB
C
/** @file
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*
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* Copyright (c) 2012-2017, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __ARM_STD_SMC_H__
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#define __ARM_STD_SMC_H__
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/*
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* SMC function IDs for Standard Service queries
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*/
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#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00
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#define ARM_SMC_ID_STD_UID 0x8400ff01
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/* 0x8400ff02 is reserved */
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#define ARM_SMC_ID_STD_REVISION 0x8400ff03
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/*
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* The 'Standard Service Call UID' is supposed to return the Standard
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* Service UUID. This is a 128-bit value.
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*/
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#define ARM_SMC_STD_UUID0 0x108d905b
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#define ARM_SMC_STD_UUID1 0x47e8f863
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#define ARM_SMC_STD_UUID2 0xfbc02dae
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#define ARM_SMC_STD_UUID3 0xe2f64156
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/*
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* ARM Standard Service Calls revision numbers
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* The current revision is: 0.1
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*/
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#define ARM_SMC_STD_REVISION_MAJOR 0x0
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#define ARM_SMC_STD_REVISION_MINOR 0x1
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/*
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* Management Mode (MM) calls cover a subset of the Standard Service Call range.
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* The list below is not exhaustive.
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*/
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#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040
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#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040
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// Request service from secure standalone MM environment
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#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041
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#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041
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/* MM return error codes */
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#define ARM_SMC_MM_RET_SUCCESS 0
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#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
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#define ARM_SMC_MM_RET_INVALID_PARAMS -2
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#define ARM_SMC_MM_RET_DENIED -3
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#define ARM_SMC_MM_RET_NO_MEMORY -4
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/*
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* Power State Coordination Interface (PSCI) calls cover a subset of the
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* Standard Service Call range.
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* The list below is not exhaustive.
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*/
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#define ARM_SMC_ID_PSCI_VERSION 0x84000000
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#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001
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#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001
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#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002
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#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003
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#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004
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#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005
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#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005
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#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008
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#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009
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/* The current PSCI version is: 0.2 */
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#define ARM_SMC_PSCI_VERSION_MAJOR 0
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#define ARM_SMC_PSCI_VERSION_MINOR 2
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#define ARM_SMC_PSCI_VERSION \
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((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
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/* PSCI return error codes */
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#define ARM_SMC_PSCI_RET_SUCCESS 0
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#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1
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#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2
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#define ARM_SMC_PSCI_RET_DENIED -3
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#define ARM_SMC_PSCI_RET_ALREADY_ON -4
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#define ARM_SMC_PSCI_RET_ON_PENDING -5
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#define ARM_SMC_PSCI_RET_INTERN_FAIL -6
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#define ARM_SMC_PSCI_RET_NOT_PRESENT -7
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#define ARM_SMC_PSCI_RET_DISABLED -8
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#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
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((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
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#define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \
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((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
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#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)
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#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2
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#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1
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#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2
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#endif
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