audk/UefiCpuPkg/PiSmmCpuDxeSmm/X64
Jiewen Yao d2fc771113 UefiCpuPkg/PiSmmCpu: Add SMM Comm Buffer Paging Protection.
This patch sets the normal OS buffer EfiLoaderCode/Data,
EfiBootServicesCode/Data, EfiConventionalMemory, EfiACPIReclaimMemory
to be not present after SmmReadyToLock.

To access these region in OS runtime phase is not a good solution.

Previously, we did similar check in SmmMemLib to help SMI handler
do the check. But if SMI handler forgets the check, it can still
access these OS region and bring risk.

So here we enforce the policy to prevent it happening.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
2016-12-19 09:37:37 +08:00
..
MpFuncs.S
MpFuncs.asm
MpFuncs.nasm UefiCpuPkg PiSmmCpuDxeSmm: Update X64/MpFuncs.nasm 2016-06-28 09:52:16 +08:00
PageTbl.c UefiCpuPkg/PiSmmCpu: Add SMM Comm Buffer Paging Protection. 2016-12-19 09:37:37 +08:00
Semaphore.c
SmiEntry.S UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failure 2016-12-16 08:27:59 +08:00
SmiEntry.asm UefiCpuPkg/PiSmmCpuDxeSmm: Fix .S & .asm build failure 2016-12-16 08:27:59 +08:00
SmiEntry.nasm UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection. 2016-11-17 16:30:07 +08:00
SmiException.S UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD 2016-12-06 23:34:16 -08:00
SmiException.asm UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD 2016-12-06 23:34:16 -08:00
SmiException.nasm UefiCpuPkg/PiSmmCpuDxeSmm: Remove MTRR field from PSD 2016-12-06 23:34:16 -08:00
SmmFuncsArch.c UefiCpuPkg/PiSmmCpu: Fixed #double fault on #page fault. 2016-12-07 13:13:55 +08:00
SmmInit.S
SmmInit.asm
SmmInit.nasm UefiCpuPkg PiSmmCpuDxeSmm: Convert X64/SmmInit.asm to NASM 2016-06-28 09:52:18 +08:00
SmmProfileArch.c UefiCpuPkg/PiSmmCpuDxeSmm: Add paging protection. 2016-11-17 16:30:07 +08:00
SmmProfileArch.h