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https://bugzilla.tianocore.org/show_bug.cgi?id=1882 The new notify phase allows platform to configure additional bus parameters in addition to parameters that can already be configured with capability override. Specifically we allow to configure bus width, clock frequency and driver strength. If platform doesn't wish to configure some of the parameters it can left it on default values and driver will assume it's standard behavior with respect to those parameters. The definition of the SD_MMC_BUS_MODE has been extended to incorporate SD card default speed and high speed. Tests on Marvell boards were also performed by Marcin Wojtas <mw@semihalf.com>: https://edk2.groups.io/g/devel/message/42999 Board 1 (out of tree): SD - OK, MMC - OK Board 2: (Armada80x0McBin): SD - OK, MMC - OK Board 3: (Armada70x0Db): SD - problems, MMC - OK Please note that the problem on Armada70x0Db SD devices are introduced by adding new types of SD bus modes, a subsequent patch within edk2-platforms repository will be proposed to address it. (More details can be referred from the above link.) Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Regression-tested-by: Sumit Garg <sumit.garg@linaro.org>
161 lines
5.0 KiB
C
161 lines
5.0 KiB
C
/** @file
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Protocol to describe overrides required to support non-standard SDHCI
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implementations
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Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __SD_MMC_OVERRIDE_H__
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#define __SD_MMC_OVERRIDE_H__
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#include <Protocol/SdMmcPassThru.h>
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#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \
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{ 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }
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#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x3
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typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;
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#define EDKII_SD_MMC_BUS_WIDTH_IGNORE MAX_UINT8
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#define EDKII_SD_MMC_CLOCK_FREQ_IGNORE MAX_UINT32
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#define EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE MAX_UINT8
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typedef enum {
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SdDriverStrengthTypeB = 0,
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SdDriverStrengthTypeA,
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SdDriverStrengthTypeC,
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SdDriverStrengthTypeD,
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SdDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE
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} SD_DRIVER_STRENGTH_TYPE;
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typedef enum {
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EmmcDriverStrengthType0 = 0,
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EmmcDriverStrengthType1,
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EmmcDriverStrengthType2,
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EmmcDriverStrengthType3,
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EmmcDriverStrengthType4,
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EmmcDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE
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} EMMC_DRIVER_STRENGTH_TYPE;
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typedef union {
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SD_DRIVER_STRENGTH_TYPE Sd;
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EMMC_DRIVER_STRENGTH_TYPE Emmc;
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} EDKII_SD_MMC_DRIVER_STRENGTH;
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typedef struct {
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//
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// The target width of the bus. If user tells driver to ignore it
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// or specifies unsupported width driver will choose highest supported
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// bus width for a given mode.
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//
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UINT8 BusWidth;
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//
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// The target clock frequency of the bus in MHz. If user tells driver to ignore
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// it or specifies unsupported frequency driver will choose highest supported
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// clock frequency for a given mode.
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//
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UINT32 ClockFreq;
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//
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// The target driver strength of the bus. If user tells driver to
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// ignore it or specifies unsupported driver strength, driver will
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// default to Type0 for eMMC cards and TypeB for SD cards. Driver strength
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// setting is only considered if chosen bus timing supports them.
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//
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EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;
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} EDKII_SD_MMC_OPERATING_PARAMETERS;
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typedef enum {
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SdMmcSdDs,
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SdMmcSdHs,
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SdMmcUhsSdr12,
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SdMmcUhsSdr25,
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SdMmcUhsSdr50,
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SdMmcUhsDdr50,
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SdMmcUhsSdr104,
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SdMmcMmcLegacy,
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SdMmcMmcHsSdr,
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SdMmcMmcHsDdr,
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SdMmcMmcHs200,
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SdMmcMmcHs400,
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} SD_MMC_BUS_MODE;
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typedef enum {
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EdkiiSdMmcResetPre,
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EdkiiSdMmcResetPost,
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EdkiiSdMmcInitHostPre,
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EdkiiSdMmcInitHostPost,
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EdkiiSdMmcUhsSignaling,
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EdkiiSdMmcSwitchClockFreqPost,
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EdkiiSdMmcGetOperatingParam
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} EDKII_SD_MMC_PHASE_TYPE;
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/**
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Override function for SDHCI capability bits
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@param[in] ControllerHandle The EFI_HANDLE of the controller.
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@param[in] Slot The 0 based slot index.
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@param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.
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@param[in,out] BaseClkFreq The base clock frequency value that
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optionally can be updated.
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@retval EFI_SUCCESS The override function completed successfully.
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@retval EFI_NOT_FOUND The specified controller or slot does not exist.
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@retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL
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**/
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typedef
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EFI_STATUS
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(EFIAPI * EDKII_SD_MMC_CAPABILITY) (
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IN EFI_HANDLE ControllerHandle,
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IN UINT8 Slot,
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IN OUT VOID *SdMmcHcSlotCapability,
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IN OUT UINT32 *BaseClkFreq
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);
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/**
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Override function for SDHCI controller operations
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@param[in] ControllerHandle The EFI_HANDLE of the controller.
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@param[in] Slot The 0 based slot index.
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@param[in] PhaseType The type of operation and whether the
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hook is invoked right before (pre) or
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right after (post)
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@param[in,out] PhaseData The pointer to a phase-specific data.
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@retval EFI_SUCCESS The override function completed successfully.
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@retval EFI_NOT_FOUND The specified controller or slot does not exist.
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@retval EFI_INVALID_PARAMETER PhaseType is invalid
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**/
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typedef
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EFI_STATUS
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(EFIAPI * EDKII_SD_MMC_NOTIFY_PHASE) (
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IN EFI_HANDLE ControllerHandle,
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IN UINT8 Slot,
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IN EDKII_SD_MMC_PHASE_TYPE PhaseType,
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IN OUT VOID *PhaseData
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);
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struct _EDKII_SD_MMC_OVERRIDE {
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//
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// Protocol version of this implementation
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//
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UINTN Version;
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//
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// Callback to override SD/MMC host controller capability bits
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//
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EDKII_SD_MMC_CAPABILITY Capability;
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//
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// Callback to invoke SD/MMC override hooks
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//
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EDKII_SD_MMC_NOTIFY_PHASE NotifyPhase;
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};
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extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid;
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#endif
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