mirror of https://github.com/acidanthera/audk.git
207 lines
5.7 KiB
C
207 lines
5.7 KiB
C
/*++
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Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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--*/
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#include "ArmGicDxe.h"
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VOID
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EFIAPI
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IrqInterruptHandler (
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IN EFI_EXCEPTION_TYPE InterruptType,
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IN EFI_SYSTEM_CONTEXT SystemContext
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);
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VOID
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EFIAPI
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ExitBootServicesEvent (
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IN EFI_EVENT Event,
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IN VOID *Context
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);
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// Making this global saves a few bytes in image size
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EFI_HANDLE gHardwareInterruptHandle = NULL;
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// Notifications
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EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
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// Maximum Number of Interrupts
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UINTN mGicNumInterrupts = 0;
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HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;
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/**
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Calculate GICD_ICFGRn base address and corresponding bit
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field Int_config[1] of the GIC distributor register.
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@param Source Hardware source of the interrupt.
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@param RegAddress Corresponding GICD_ICFGRn base address.
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@param Config1Bit Bit number of F Int_config[1] bit in the register.
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@retval EFI_SUCCESS Source interrupt supported.
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@retval EFI_UNSUPPORTED Source interrupt is not supported.
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**/
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EFI_STATUS
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GicGetDistributorIcfgBaseAndBit (
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IN HARDWARE_INTERRUPT_SOURCE Source,
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OUT UINTN *RegAddress,
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OUT UINTN *Config1Bit
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)
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{
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UINTN RegIndex;
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UINTN Field;
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if (Source >= mGicNumInterrupts) {
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ASSERT(Source < mGicNumInterrupts);
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return EFI_UNSUPPORTED;
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}
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RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant
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Field = Source % ARM_GIC_ICDICFR_F_STRIDE;
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*RegAddress = PcdGet64 (PcdGicDistributorBase)
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+ ARM_GIC_ICDICFR
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+ (ARM_GIC_ICDICFR_BYTES * RegIndex);
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*Config1Bit = ((Field * ARM_GIC_ICDICFR_F_WIDTH)
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+ ARM_GIC_ICDICFR_F_CONFIG1_BIT);
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return EFI_SUCCESS;
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}
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/**
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Register Handler for the specified interrupt source.
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@param This Instance pointer for this protocol
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@param Source Hardware source of the interrupt
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@param Handler Callback for interrupt. NULL to unregister
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@retval EFI_SUCCESS Source was updated to support Handler.
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@retval EFI_DEVICE_ERROR Hardware could not be programmed.
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**/
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EFI_STATUS
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EFIAPI
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RegisterInterruptSource (
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IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
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IN HARDWARE_INTERRUPT_SOURCE Source,
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IN HARDWARE_INTERRUPT_HANDLER Handler
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)
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{
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if (Source >= mGicNumInterrupts) {
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ASSERT(FALSE);
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return EFI_UNSUPPORTED;
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}
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if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {
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return EFI_ALREADY_STARTED;
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}
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gRegisteredInterruptHandlers[Source] = Handler;
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// If the interrupt handler is unregistered then disable the interrupt
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if (NULL == Handler){
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return This->DisableInterruptSource (This, Source);
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} else {
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return This->EnableInterruptSource (This, Source);
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}
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}
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STATIC VOID *mCpuArchProtocolNotifyEventRegistration;
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STATIC
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VOID
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EFIAPI
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CpuArchEventProtocolNotify (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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EFI_CPU_ARCH_PROTOCOL *Cpu;
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EFI_STATUS Status;
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// Get the CPU protocol that this driver requires.
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Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);
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if (EFI_ERROR (Status)) {
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return;
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}
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// Unregister the default exception handler.
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Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
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__FUNCTION__, Status));
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return;
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}
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// Register to receive interrupts
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Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ,
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Context);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: Cpu->RegisterInterruptHandler() - %r\n",
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__FUNCTION__, Status));
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}
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gBS->CloseEvent (Event);
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}
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EFI_STATUS
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InstallAndRegisterInterruptService (
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IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
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IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
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IN EFI_EVENT_NOTIFY ExitBootServicesEvent
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)
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{
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EFI_STATUS Status;
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CONST UINTN RihArraySize =
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(sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
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// Initialize the array for the Interrupt Handlers
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gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);
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if (gRegisteredInterruptHandlers == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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Status = gBS->InstallMultipleProtocolInterfaces (
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&gHardwareInterruptHandle,
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&gHardwareInterruptProtocolGuid,
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InterruptProtocol,
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&gHardwareInterrupt2ProtocolGuid,
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Interrupt2Protocol,
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NULL
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Install the interrupt handler as soon as the CPU arch protocol appears.
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//
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EfiCreateProtocolNotifyEvent (
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&gEfiCpuArchProtocolGuid,
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TPL_CALLBACK,
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CpuArchEventProtocolNotify,
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InterruptHandler,
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&mCpuArchProtocolNotifyEventRegistration);
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// Register for an ExitBootServicesEvent
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Status = gBS->CreateEvent (
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EVT_SIGNAL_EXIT_BOOT_SERVICES,
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TPL_NOTIFY,
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ExitBootServicesEvent,
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NULL,
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&EfiExitBootServicesEvent
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);
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return Status;
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}
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