mirror of https://github.com/acidanthera/audk.git
185 lines
6.6 KiB
C
185 lines
6.6 KiB
C
/** @file
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Definition of the MMC Host Protocol
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Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __MMC_HOST_H__
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#define __MMC_HOST_H__
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///
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/// Global ID for the MMC Host Protocol
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///
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#define EMBEDDED_MMC_HOST_PROTOCOL_GUID \
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{ 0x3e591c00, 0x9e4a, 0x11df, {0x92, 0x44, 0x00, 0x02, 0xA5, 0xD5, 0xC5, 0x1B } }
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#define MMC_RESPONSE_TYPE_R1 0
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#define MMC_RESPONSE_TYPE_R1b 0
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#define MMC_RESPONSE_TYPE_R2 1
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#define MMC_RESPONSE_TYPE_R3 0
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#define MMC_RESPONSE_TYPE_R6 0
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#define MMC_RESPONSE_TYPE_R7 0
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#define MMC_RESPONSE_TYPE_OCR 0
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#define MMC_RESPONSE_TYPE_CID 1
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#define MMC_RESPONSE_TYPE_CSD 1
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#define MMC_RESPONSE_TYPE_RCA 0
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typedef UINT32 MMC_RESPONSE_TYPE;
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typedef UINT32 MMC_CMD;
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#define MMC_CMD_WAIT_RESPONSE (1 << 16)
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#define MMC_CMD_LONG_RESPONSE (1 << 17)
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#define MMC_CMD_NO_CRC_RESPONSE (1 << 18)
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#define MMC_INDX(Index) ((Index) & 0xFFFF)
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#define MMC_GET_INDX(MmcCmd) ((MmcCmd) & 0xFFFF)
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#define MMC_CMD0 (MMC_INDX(0) | MMC_CMD_NO_CRC_RESPONSE)
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#define MMC_CMD1 (MMC_INDX(1) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)
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#define MMC_CMD2 (MMC_INDX(2) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)
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#define MMC_CMD3 (MMC_INDX(3) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD5 (MMC_INDX(5) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)
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#define MMC_CMD6 (MMC_INDX(6) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD7 (MMC_INDX(7) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD8 (MMC_INDX(8) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD9 (MMC_INDX(9) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)
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#define MMC_CMD11 (MMC_INDX(11) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD12 (MMC_INDX(12) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD13 (MMC_INDX(13) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD16 (MMC_INDX(16) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD17 (MMC_INDX(17) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD18 (MMC_INDX(18) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD20 (MMC_INDX(20) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD23 (MMC_INDX(23) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD24 (MMC_INDX(24) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD25 (MMC_INDX(25) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_CMD55 (MMC_INDX(55) | MMC_CMD_WAIT_RESPONSE)
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#define MMC_ACMD41 (MMC_INDX(41) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)
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#define MMC_ACMD51 (MMC_INDX(51) | MMC_CMD_WAIT_RESPONSE)
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// Valid responses for CMD1 in eMMC
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#define EMMC_CMD1_CAPACITY_LESS_THAN_2GB 0x00FF8080 // Capacity <= 2GB, byte addressing used
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#define EMMC_CMD1_CAPACITY_GREATER_THAN_2GB 0x40FF8080 // Capacity > 2GB, 512-byte sector addressing used
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#define MMC_STATUS_APP_CMD (1 << 5)
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typedef enum _MMC_STATE {
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MmcInvalidState = 0,
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MmcHwInitializationState,
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MmcIdleState,
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MmcReadyState,
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MmcIdentificationState,
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MmcStandByState,
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MmcTransferState,
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MmcSendingDataState,
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MmcReceiveDataState,
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MmcProgrammingState,
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MmcDisconnectState,
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} MMC_STATE;
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#define EMMCBACKWARD (0)
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#define EMMCHS26 (1 << 0) // High-Speed @26MHz at rated device voltages
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#define EMMCHS52 (1 << 1) // High-Speed @52MHz at rated device voltages
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#define EMMCHS52DDR1V8 (1 << 2) // High-Speed Dual Data Rate @52MHz 1.8V or 3V I/O
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#define EMMCHS52DDR1V2 (1 << 3) // High-Speed Dual Data Rate @52MHz 1.2V I/O
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#define EMMCHS200SDR1V8 (1 << 4) // HS200 Single Data Rate @200MHz 1.8V I/O
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#define EMMCHS200SDR1V2 (1 << 5) // HS200 Single Data Rate @200MHz 1.2V I/O
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#define EMMCHS400DDR1V8 (1 << 6) // HS400 Dual Data Rate @400MHz 1.8V I/O
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#define EMMCHS400DDR1V2 (1 << 7) // HS400 Dual Data Rate @400MHz 1.2V I/O
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///
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/// Forward declaration for EFI_MMC_HOST_PROTOCOL
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///
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typedef struct _EFI_MMC_HOST_PROTOCOL EFI_MMC_HOST_PROTOCOL;
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typedef BOOLEAN (EFIAPI *MMC_ISCARDPRESENT) (
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IN EFI_MMC_HOST_PROTOCOL *This
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);
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typedef BOOLEAN (EFIAPI *MMC_ISREADONLY) (
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IN EFI_MMC_HOST_PROTOCOL *This
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);
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typedef EFI_STATUS (EFIAPI *MMC_BUILDDEVICEPATH) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
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);
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typedef EFI_STATUS (EFIAPI *MMC_NOTIFYSTATE) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN MMC_STATE State
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);
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typedef EFI_STATUS (EFIAPI *MMC_SENDCOMMAND) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN MMC_CMD Cmd,
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IN UINT32 Argument
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);
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typedef EFI_STATUS (EFIAPI *MMC_RECEIVERESPONSE) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN MMC_RESPONSE_TYPE Type,
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IN UINT32 *Buffer
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);
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typedef EFI_STATUS (EFIAPI *MMC_READBLOCKDATA) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN EFI_LBA Lba,
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IN UINTN Length,
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OUT UINT32 *Buffer
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);
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typedef EFI_STATUS (EFIAPI *MMC_WRITEBLOCKDATA) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN EFI_LBA Lba,
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IN UINTN Length,
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IN UINT32 *Buffer
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);
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typedef EFI_STATUS (EFIAPI *MMC_SETIOS) (
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IN EFI_MMC_HOST_PROTOCOL *This,
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IN UINT32 BusClockFreq,
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IN UINT32 BusWidth,
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IN UINT32 TimingMode
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);
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typedef BOOLEAN (EFIAPI *MMC_ISMULTIBLOCK) (
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IN EFI_MMC_HOST_PROTOCOL *This
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);
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struct _EFI_MMC_HOST_PROTOCOL {
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UINT32 Revision;
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MMC_ISCARDPRESENT IsCardPresent;
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MMC_ISREADONLY IsReadOnly;
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MMC_BUILDDEVICEPATH BuildDevicePath;
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MMC_NOTIFYSTATE NotifyState;
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MMC_SENDCOMMAND SendCommand;
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MMC_RECEIVERESPONSE ReceiveResponse;
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MMC_READBLOCKDATA ReadBlockData;
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MMC_WRITEBLOCKDATA WriteBlockData;
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MMC_SETIOS SetIos;
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MMC_ISMULTIBLOCK IsMultiBlock;
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};
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#define MMC_HOST_PROTOCOL_REVISION 0x00010002 // 1.2
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#define MMC_HOST_HAS_SETIOS(Host) (Host->Revision >= MMC_HOST_PROTOCOL_REVISION && \
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Host->SetIos != NULL)
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#define MMC_HOST_HAS_ISMULTIBLOCK(Host) (Host->Revision >= MMC_HOST_PROTOCOL_REVISION && \
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Host->IsMultiBlock != NULL)
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extern EFI_GUID gEmbeddedMmcHostProtocolGuid;
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#endif
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