mirror of https://github.com/acidanthera/audk.git
617 lines
15 KiB
Plaintext
617 lines
15 KiB
Plaintext
/**************************************************************************;
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;* *;
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;* *;
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;* Intel Corporation - ACPI Reference Code for the Baytrail *;
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;* Family of Customer Reference Boards. *;
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;* *;
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;* *;
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;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
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;
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; This program and the accompanying materials are licensed and made available under
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; the terms and conditions of the BSD License that accompanies this distribution.
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; The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;* *;
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;* *;
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;**************************************************************************/
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Device (PEPD)
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{
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Name (_HID, "INT3396")
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Name(_CID, 0x800dd041)
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Name (_UID, 0x1)
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// Indicates if the platform PEP has loaded
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Name(PEPP, Zero)
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// Devices score-boarded by the PEP, Rev0 format
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Name (DEVS, Package() {0})
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// Devices score-boarded by the PEP, Rev1 format
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Name(DEVX, Package()
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{
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Package () {"\\_SB.PCI0.XHC1", 0x1},
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Package () {"\\_SB.PCI0.EHC1", 0x1},
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Package () {"\\_SB.PCI0.GFX0", 0x1},
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Package () {"\\_SB.PCI0.GFX0.ISP0", 0x1},
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Package () {"\\_SB.PCI0.SEC0", 0x1},
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Package () {"\\_SB.I2C1", 0x1},
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Package () {"\\_SB.I2C2", 0x1},
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Package () {"\\_SB.I2C3", 0x1},
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Package () {"\\_SB.I2C4", 0x1},
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Package () {"\\_SB.I2C5", 0x1},
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Package () {"\\_SB.I2C6", 0x1},
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Package () {"\\_SB.I2C7", 0x1},
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Package () {"\\_SB.SDHA", 0x1},
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Package () {"\\_SB.SDHB", 0x1},
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Package () {"\\_SB.SDHC", 0x1},
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Package () {"\\_SB.SPI1", 0x1},
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Package () {"\\_SB.URT1", 0x1},
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Package () {"\\_SB.URT2", 0x1},
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})
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// Crashdump device package
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Name(CDMP, Package(2) {})
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// Device dependency for uPEP
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Name(DEVY, Package()
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{
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Package() {"\\_PR.CPU0", 0x1, Package() {Package() {0xFF, 0}}},
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Package() {"\\_PR.CPU1", 0x1, Package() {Package() {0xFF, 0}}},
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Package() {"\\_PR.CPU2", 0x1, Package() {Package() {0xFF, 0}}},
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Package() {"\\_PR.CPU3", 0x1, Package() {Package() {0xFF, 0}}},
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Package() {"\\_SB.I2C1", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.I2C2", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.I2C3", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.I2C4", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.I2C5", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.I2C6", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.I2C7", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.PCI0.GFX0", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.PCI0.SEC0", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.PCI0.XHC1", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.PCI0.GFX0.ISP0", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.LPEA", 0x1, Package() {Package() {0x0,3}, Package() {0x1,0}, Package() {0x2,3}, Package() {0x3,3}}},
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Package() {"\\_SB.SDHA", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.SDHB", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.SDHC", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.SPI1", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.URT1", 0x1, Package() {Package() {0xFF,3}}},
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Package() {"\\_SB.URT2", 0x1, Package() {Package() {0xFF,3}}}
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})
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// BCCD crashdump information
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Name(BCCD, Package()
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{
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Package()
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{
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"\\_SB.SDHA",
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Package()
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{
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Package() { Package() {0, 32, 0, 3, 0xFFFFFFFFFFFFFFFF}, Package() {0xFFFFFFFC, 0x0, 0x4}, 0}
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}
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}
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})
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Method(_STA, 0x0, NotSerialized)
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{
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Return(0xf)
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}
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Method(_DSM, 0x4, Serialized)
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{
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If(LEqual(Arg0,ToUUID("B8FEBFE0-BAF8-454b-AECD-49FB91137B21")))
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{
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// Number of fn IDs supported
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If(LEqual(Arg2, Zero))
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{
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Return(Buffer(One)
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{
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0xf
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})
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}
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// Pep presence
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If(LEqual(Arg2, One))
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{
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Store(0x1, PEPP)
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Return(0xf)
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}
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// Mitigation devices
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If(LEqual(Arg2, 0x2))
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{
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If(LEqual(Arg1, 0x0))
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{
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// Rev0
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Return(DEVS)
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}
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If(LEqual(Arg1, 0x1))
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{
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// Rev1
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Return(DEVX)
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}
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}
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// Crashdump device data
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If(LEqual(Arg2, 0x3))
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{
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Store("\\_SB.SDHA", Index(CDMP,0))
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Store(EM1A, Index(CDMP,1))
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Return(CDMP)
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}
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}
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// New UUID for built-in uPEP
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If(LEqual(Arg0,ToUUID("C4EB40A0-6CD2-11E2-BCFD-0800200C9A66")))
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{
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// Number of fn IDs supported
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If(LEqual(Arg2, Zero))
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{
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Return(Buffer(One)
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{
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0x7
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})
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}
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// LPI device dependencies
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If(LEqual(Arg2, 0x1))
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{
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Return(DEVY)
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}
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// Crashdump device data
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If(LEqual(Arg2, 0x2))
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{
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Store(EM1A, Local0)
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Add(Local0, 0x84, Local0)
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Store(Local0, Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(DerefOf(Index(BCCD, Zero, )), One, )), Zero, )), Zero, )), 0x4, ))
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Return(BCCD)
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}
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}
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Return(One)
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}
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}
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//
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// eMMC 4.41
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//
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Device(SDHA)
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{
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Name (_ADR, 0)
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Name (_HID, "80860F14")
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Name (_CID, "PNP0D40")
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Name (_DDN, "Intel(R) eMMC Controller - 80860F14")
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Name (_UID, 1)
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Name(_DEP, Package(0x1)
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{
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PEPD
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})
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Name (RBF1, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
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Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {45} // eMMC 4.41 IRQ
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})
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Method (_CRS, 0x0, NotSerialized)
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{
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// Update the Base address for BAR0 of eMMC 4.41
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CreateDwordField(^RBF1, ^BAR0._BAS, B0B1)
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CreateDwordField(^RBF1, ^BAR0._LEN, B0L1)
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Store(eM0A, B0B1)
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Store(eM0L, B0L1)
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Return (RBF1)
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}
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Method (_STA, 0x0, NotSerialized)
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{
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//
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// PCIM>> 0:ACPI mode 1:PCI mode
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// SD1D>> 0:eMMC 4.41 enable 1:eMMC 4.41 disable
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//
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If (LAnd(LEqual(PCIM, 0), LEqual(SD1D, 0)))
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{
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Return (0xF)
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}
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Else
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{
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Return (0x0)
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}
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}
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Method (_PS3, 0, NotSerialized)
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{
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OR(PSAT, 0x00000003, PSAT)
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OR(PSAT, 0X00000000, PSAT)
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//
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// If not B1, still keep 2 ms w/a
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//
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If(LLess(SOCS, 0x03))
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{
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Sleep(2)
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}
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}
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Method (_PS0, 0, NotSerialized)
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{
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And(PSAT, 0xfffffffC, PSAT)
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OR(PSAT, 0X00000000, PSAT)
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//
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// If not B1, still keep 2 ms w/a
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//
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If(LLess(SOCS, 0x03))
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{
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Sleep(2)
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}
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}
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OperationRegion (KEYS, SystemMemory, eM1A, 0x100)
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Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
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{
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Offset (0x84),
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PSAT, 32
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}
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Method (_DIS, 0x0, NotSerialized)
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{
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//Adding dummy disable methods for device EMM0
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}
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Device (EMMD)
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{
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Name (_ADR, 0x00000008) // Slot 0, Function 8
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Method (_RMV, 0, NotSerialized)
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{
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Return (0x0)
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}
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}
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}
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//
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// eMMC 4.5
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//
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Device(SDHD)
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{
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Name (_ADR, 0)
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Name (_HID, "80860F14")
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Name (_CID, "PNP0D40")
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Name (_DDN, "Intel(R) eMMC Controller - 80860F14")
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Name (_UID, 1)
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Name(_DEP, Package(0x1)
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{
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PEPD
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})
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Name (RBF1, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
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Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {44} // eMMC 4.5 IRQ
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})
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Method (_CRS, 0x0, NotSerialized)
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{
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CreateDwordField(^RBF1, ^BAR0._BAS, B0B1)
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CreateDwordField(^RBF1, ^BAR0._LEN, B0L1)
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Store(eM0A, B0B1)
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Store(eM0L, B0L1)
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Return (RBF1)
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}
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Method (_STA, 0x0, NotSerialized)
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{
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//
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// PCIM>> 0:ACPI mode 1:PCI mode
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// HSID>> 0:eMMC 4.5 enable 1:eMMC 4.5 disable
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//
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If (LAnd(LEqual(PCIM, 0), LEqual(HSID, 0)))
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{
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Return (0xF)
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}
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Else
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{
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Return (0x0)
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}
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}
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Method (_PS3, 0, NotSerialized)
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{
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OR(PSAT, 0x00000003, PSAT)
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OR(PSAT, 0X00000000, PSAT)
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//
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// If not B1, still keep 2 ms w/a
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//
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If(LLess(SOCS, 0x03))
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{
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Sleep(2)
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}
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}
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Method (_PS0, 0, NotSerialized)
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{
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And(PSAT, 0xfffffffC, PSAT)
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OR(PSAT, 0X00000000, PSAT)
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//
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// If not B1, still keep 2 ms w/a
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//
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If(LLess(SOCS, 0x03))
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{
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Sleep(2)
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}
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}
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OperationRegion (KEYS, SystemMemory, eM1A, 0x100)
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Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
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{
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Offset (0x84),
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PSAT, 32
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}
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Method (_DIS, 0x0, NotSerialized)
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{
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//Adding dummy disable methods for device EMM0
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}
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Device (EM45)
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{
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Name (_ADR, 0x00000008) // Slot 0, Function 8
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Method (_RMV, 0, NotSerialized)
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{
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Return (0x0)
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}
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}
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}
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//
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// SDIO
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//
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Device(SDHB)
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{
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Name (_ADR, 0)
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Name (_HID, "INT33BB")
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Name (_CID, "PNP0D40")
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Name (_DDN, "Intel(R) SDIO Controller - 80860F15")
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Name (_UID, 2)
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Name (_HRV, 2)
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Name(_DEP, Package(0x01)
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{
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PEPD
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})
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Name (PSTS, 0x0)
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Name (RBUF, ResourceTemplate ()
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{
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Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
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Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {46} // SDIO IRQ
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})
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Method (_CRS, 0x0, NotSerialized)
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{
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CreateDwordField(^RBUF, ^BAR0._BAS, B0BA)
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CreateDwordField(^RBUF, ^BAR0._LEN, B0LN)
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Store(SI0A, B0BA)
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Store(SI0L, B0LN)
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Return (RBUF)
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}
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Method (_STA, 0x0, NotSerialized)
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{
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If (LLessEqual(STEP, 0x04))
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{
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//A stepping
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Store(SDMD, _HRV)
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}
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//
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// PCIM>> 0:ACPI mode 1:PCI mode
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//
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If (LEqual(PCIM, 1)) {
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Return (0x0)
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}
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If (LOr(LEqual(SI0A, 0), LEqual(SD2D, 1)))
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{
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Return (0x0)
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}
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Return (0xF)
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}
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Method (_DIS, 0x0, NotSerialized)
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{
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//Adding dummy disable methods for device EMM0
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}
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Method (_PS3, 0, NotSerialized)
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{
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OR(PSAT, 0x00000003, PSAT)
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OR(PSAT, 0X00000000, PSAT)
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}
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Method (_PS0, 0, NotSerialized)
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{
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And(PSAT, 0xfffffffC, PSAT)
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OR(PSAT, 0X00000000, PSAT)
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if(LEqual(\_SB.SDHB.PSTS,0x0))
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{
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if(LEqual (\_SB.GPO2.AVBL, 1))
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{
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Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state
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Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON
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}
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}
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}
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OperationRegion (KEYS, SystemMemory, SI1A, 0x100)
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Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
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{
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Offset (0x84),
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PSAT, 32
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}
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Device (BRCM)
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{
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Name (_ADR, 0x01) //SlotNumber + Function
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Name (_DEP, Package() {\_SB.GPO2})
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Method (_RMV, 0, NotSerialized)
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{
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Return (0x0)
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}
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Name (_PRW, Package() {0, 0})
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Name (_S4W, 2)
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Method (_CRS, 0, Serialized)
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{
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Name (RBUF, ResourceTemplate ()
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{
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Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {73}
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})
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Return (RBUF)
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}
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Method (_PS3, 0, NotSerialized)
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{
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if(LEqual (\_SB.GPO2.AVBL, 1))
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{
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Store( 0x00, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 0 puts the device in reset state
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Store( 0x00, \_SB.SDHB.PSTS) //Indicates that the device is powered off
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}
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}
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Method (_PS0, 0, NotSerialized)
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{
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if(LEqual(\_SB.SDHB.PSTS,0x0))
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{
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if(LEqual (\_SB.GPO2.AVBL, 1))
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{
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Store( 0x01, \_SB.GPO2.WFD3 ) // WL_WIFI_REQ_ON = 1 put the device to normal state
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Store( 0x01, \_SB.SDHB.PSTS) // indicates that the device powered ON
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}
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}
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}
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} // Device (BRCM)
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//
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// Secondary Broadcom WIFI function
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//
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Device(BRC2)
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{
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Name(_ADR, 0x2) // function 2
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Name(_STA, 0xf)
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//
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// The device is not removable. This must be a method.
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//
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Method(_RMV, 0x0, NotSerialized)
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{
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Return(0x0)
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}
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//
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// Describe a vendor-defined connection between this device and the
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// primary wifi device
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//
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Method(_CRS)
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{
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Name(NAM, Buffer() {"\\_SB.SDHB.BRCM"})
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Name(SPB, Buffer()
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{
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0x8E, // SPB Descriptor
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0x18, 0x00, // Length including NAM above
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0x01, // +0x00 SPB Descriptor Revision
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0x00, // +0x01 Resource Source Index
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0xc0, // +0x02 Bus type - vendor defined
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0x02, // +0x03 Consumer + controller initiated
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0x00, 0x00, // +0x04 Type specific flags
|
|
0x01, // +0x06 Type specific revision
|
|
0x00, 0x00 // +0x07 type specific data length
|
|
// +0x09 - 0xf bytes for NULL-terminated NAM
|
|
// Length = 0x18
|
|
})
|
|
|
|
Name(END, Buffer() {0x79, 0x00})
|
|
Concatenate(SPB, NAM, Local0)
|
|
Concatenate(Local0, END, Local1)
|
|
Return(Local1)
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
//
|
|
// SD Card
|
|
//
|
|
Device(SDHC)
|
|
{
|
|
Name (_ADR, 0)
|
|
Name (_HID, "80860F16")
|
|
Name (_CID, "PNP0D40")
|
|
Name (_DDN, "Intel(R) SD Card Controller - 80860F16")
|
|
Name (_UID, 3)
|
|
Name(_DEP, Package(0x01)
|
|
{
|
|
PEPD
|
|
})
|
|
Name (RBUF, ResourceTemplate ()
|
|
{
|
|
Memory32Fixed (ReadWrite, 0x00000000, 0x00001000, BAR0)
|
|
Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {47} // SD Card IRQ
|
|
})
|
|
Method (_CRS, 0x0, NotSerialized)
|
|
{
|
|
CreateDwordField(^RBUF, ^BAR0._BAS, B0BA)
|
|
CreateDwordField(^RBUF, ^BAR0._LEN, B0LN)
|
|
Store(SD0A, B0BA)
|
|
Store(SD0L, B0LN)
|
|
Return (RBUF)
|
|
}
|
|
Method (_STA, 0x0, NotSerialized)
|
|
{
|
|
//
|
|
// PCIM>> 0:ACPI mode 1:PCI mode
|
|
//
|
|
If (LEqual(PCIM, 1)) {
|
|
Return (0x0)
|
|
}
|
|
|
|
If (LOr(LEqual(SD0A, 0), LEqual(SD3D, 1)))
|
|
{
|
|
Return (0x0)
|
|
}
|
|
Return (0xF)
|
|
}
|
|
|
|
Method (_PS3, 0, NotSerialized)
|
|
{
|
|
OR(PSAT, 0x00000003, PSAT)
|
|
OR(PSAT, 0X00000000, PSAT)
|
|
}
|
|
Method (_PS0, 0, NotSerialized)
|
|
{
|
|
And(PSAT, 0xfffffffC, PSAT)
|
|
OR(PSAT, 0X00000000, PSAT)
|
|
}
|
|
OperationRegion (KEYS, SystemMemory, SD1A, 0x100)
|
|
Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
|
|
{
|
|
Offset (0x84),
|
|
PSAT, 32
|
|
}
|
|
|
|
Device (CARD)
|
|
{
|
|
Name (_ADR, 0x00000008)
|
|
Method(_RMV, 0x0, NotSerialized)
|
|
{
|
|
// SDRM = 0 non-removable;
|
|
If (LEqual(SDRM, 0))
|
|
{
|
|
Return (0)
|
|
}
|
|
|
|
Return (1)
|
|
}
|
|
}
|
|
|
|
}
|
|
|