mirror of https://github.com/acidanthera/audk.git
912 lines
28 KiB
C
912 lines
28 KiB
C
/** @file
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CPU PEI Module installs CPU Multiple Processor PPI.
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuMpPei.h"
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//
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// Global Descriptor Table (GDT)
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//
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GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
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/* selector { Global Segment Descriptor } */
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/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
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/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
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/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
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/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
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/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
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/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
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/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
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/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
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/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
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};
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//
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// IA32 Gdt register
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//
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GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
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sizeof (mGdtEntries) - 1,
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(UINTN) mGdtEntries
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};
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GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {
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(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
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&gEfiEndOfPeiSignalPpiGuid,
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CpuMpEndOfPeiCallback
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};
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/**
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Sort the APIC ID of all processors.
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This function sorts the APIC ID of all processors so that processor number is
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assigned in the ascending order of APIC ID which eases MP debugging.
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@param PeiCpuMpData Pointer to PEI CPU MP Data
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**/
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VOID
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SortApicId (
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IN PEI_CPU_MP_DATA *PeiCpuMpData
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)
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{
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UINTN Index1;
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UINTN Index2;
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UINTN Index3;
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UINT32 ApicId;
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PEI_CPU_DATA CpuData;
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UINT32 ApCount;
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ApCount = PeiCpuMpData->CpuCount - 1;
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if (ApCount != 0) {
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for (Index1 = 0; Index1 < ApCount; Index1++) {
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Index3 = Index1;
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//
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// Sort key is the hardware default APIC ID
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//
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ApicId = PeiCpuMpData->CpuData[Index1].ApicId;
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for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {
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if (ApicId > PeiCpuMpData->CpuData[Index2].ApicId) {
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Index3 = Index2;
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ApicId = PeiCpuMpData->CpuData[Index2].ApicId;
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}
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}
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if (Index3 != Index1) {
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CopyMem (&CpuData, &PeiCpuMpData->CpuData[Index3], sizeof (PEI_CPU_DATA));
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CopyMem (
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&PeiCpuMpData->CpuData[Index3],
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&PeiCpuMpData->CpuData[Index1],
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sizeof (PEI_CPU_DATA)
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);
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CopyMem (&PeiCpuMpData->CpuData[Index1], &CpuData, sizeof (PEI_CPU_DATA));
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}
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}
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//
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// Get the processor number for the BSP
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//
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ApicId = GetInitialApicId ();
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for (Index1 = 0; Index1 < PeiCpuMpData->CpuCount; Index1++) {
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if (PeiCpuMpData->CpuData[Index1].ApicId == ApicId) {
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PeiCpuMpData->BspNumber = (UINT32) Index1;
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break;
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}
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}
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}
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}
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/**
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Enable x2APIC mode on APs.
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@param Buffer Pointer to private data buffer.
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**/
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VOID
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EFIAPI
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ApFuncEnableX2Apic (
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IN OUT VOID *Buffer
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)
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{
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SetApicMode (LOCAL_APIC_MODE_X2APIC);
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}
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/**
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Get AP loop mode.
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@param MonitorFilterSize Returns the largest monitor-line size in bytes.
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@return The AP loop mode.
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**/
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UINT8
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GetApLoopMode (
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OUT UINT16 *MonitorFilterSize
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)
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{
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UINT8 ApLoopMode;
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UINT32 RegEbx;
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UINT32 RegEcx;
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UINT32 RegEdx;
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ASSERT (MonitorFilterSize != NULL);
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ApLoopMode = PcdGet8 (PcdCpuApLoopMode);
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ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);
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if (ApLoopMode == ApInMwaitLoop) {
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);
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if ((RegEcx & BIT3) == 0) {
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//
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// If processor does not support MONITOR/MWAIT feature
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// by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode
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//
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ApLoopMode = ApInHltLoop;
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}
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}
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if (ApLoopMode == ApInHltLoop) {
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*MonitorFilterSize = 0;
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} else if (ApLoopMode == ApInRunLoop) {
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*MonitorFilterSize = sizeof (UINT32);
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} else if (ApLoopMode == ApInMwaitLoop) {
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//
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// CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes
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// CPUID.[EAX=05H].EDX: C-states supported using MWAIT
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//
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AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);
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*MonitorFilterSize = RegEbx & 0xFFFF;
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}
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return ApLoopMode;
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}
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/**
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Get CPU MP Data pointer from the Guided HOB.
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@return Pointer to Pointer to PEI CPU MP Data
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**/
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PEI_CPU_MP_DATA *
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GetMpHobData (
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VOID
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)
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{
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EFI_HOB_GUID_TYPE *GuidHob;
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VOID *DataInHob;
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PEI_CPU_MP_DATA *CpuMpData;
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CpuMpData = NULL;
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GuidHob = GetFirstGuidHob (&gEfiCallerIdGuid);
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if (GuidHob != NULL) {
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DataInHob = GET_GUID_HOB_DATA (GuidHob);
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CpuMpData = (PEI_CPU_MP_DATA *)(*(UINTN *)DataInHob);
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}
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ASSERT (CpuMpData != NULL);
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return CpuMpData;
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}
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/**
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Save the volatile registers required to be restored following INIT IPI.
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@param VolatileRegisters Returns buffer saved the volatile resisters
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**/
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VOID
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SaveVolatileRegisters (
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OUT CPU_VOLATILE_REGISTERS *VolatileRegisters
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)
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{
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UINT32 RegEdx;
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VolatileRegisters->Cr0 = AsmReadCr0 ();
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VolatileRegisters->Cr3 = AsmReadCr3 ();
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VolatileRegisters->Cr4 = AsmReadCr4 ();
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);
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if ((RegEdx & BIT2) != 0) {
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//
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// If processor supports Debugging Extensions feature
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// by CPUID.[EAX=01H]:EDX.BIT2
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//
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VolatileRegisters->Dr0 = AsmReadDr0 ();
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VolatileRegisters->Dr1 = AsmReadDr1 ();
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VolatileRegisters->Dr2 = AsmReadDr2 ();
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VolatileRegisters->Dr3 = AsmReadDr3 ();
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VolatileRegisters->Dr6 = AsmReadDr6 ();
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VolatileRegisters->Dr7 = AsmReadDr7 ();
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}
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}
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/**
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Restore the volatile registers following INIT IPI.
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@param VolatileRegisters Pointer to volatile resisters
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@param IsRestoreDr TRUE: Restore DRx if supported
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FALSE: Do not restore DRx
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**/
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VOID
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RestoreVolatileRegisters (
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IN CPU_VOLATILE_REGISTERS *VolatileRegisters,
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IN BOOLEAN IsRestoreDr
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)
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{
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UINT32 RegEdx;
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AsmWriteCr0 (VolatileRegisters->Cr0);
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AsmWriteCr3 (VolatileRegisters->Cr3);
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AsmWriteCr4 (VolatileRegisters->Cr4);
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if (IsRestoreDr) {
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);
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if ((RegEdx & BIT2) != 0) {
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//
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// If processor supports Debugging Extensions feature
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// by CPUID.[EAX=01H]:EDX.BIT2
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//
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AsmWriteDr0 (VolatileRegisters->Dr0);
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AsmWriteDr1 (VolatileRegisters->Dr1);
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AsmWriteDr2 (VolatileRegisters->Dr2);
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AsmWriteDr3 (VolatileRegisters->Dr3);
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AsmWriteDr6 (VolatileRegisters->Dr6);
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AsmWriteDr7 (VolatileRegisters->Dr7);
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}
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}
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}
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/**
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This function will be called from AP reset code if BSP uses WakeUpAP.
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@param ExchangeInfo Pointer to the MP exchange info buffer
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@param NumApsExecuting Number of current executing AP
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**/
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VOID
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EFIAPI
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ApCFunction (
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IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,
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IN UINTN NumApsExecuting
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)
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{
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PEI_CPU_MP_DATA *PeiCpuMpData;
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UINTN ProcessorNumber;
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EFI_AP_PROCEDURE Procedure;
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UINTN BistData;
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volatile UINT32 *ApStartupSignalBuffer;
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PeiCpuMpData = ExchangeInfo->PeiCpuMpData;
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while (TRUE) {
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if (PeiCpuMpData->InitFlag) {
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ProcessorNumber = NumApsExecuting;
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//
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// Sync BSP's Control registers to APs
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//
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RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);
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//
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// This is first time AP wakeup, get BIST information from AP stack
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//
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BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));
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PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;
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PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();
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if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {
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//
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// Set x2APIC mode if there are any logical processor reporting
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// an APIC ID of 255 or greater.
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//
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AcquireSpinLock(&PeiCpuMpData->MpLock);
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PeiCpuMpData->X2ApicEnable = TRUE;
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ReleaseSpinLock(&PeiCpuMpData->MpLock);
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}
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//
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// Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.
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//
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MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);
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MicrocodeDetect ();
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PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;
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} else {
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//
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// Execute AP function if AP is not disabled
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//
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GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);
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if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {
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//
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// Restore AP's volatile registers saved
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//
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RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);
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}
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if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&
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(PeiCpuMpData->ApFunction != 0)) {
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PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;
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Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;
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//
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// Invoke AP function here
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//
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Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);
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//
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// Re-get the processor number due to BSP/AP maybe exchange in AP function
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//
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GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);
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PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;
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}
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}
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//
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// AP finished executing C code
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//
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InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);
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//
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// Place AP is specified loop mode
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//
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if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {
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//
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// Save AP volatile registers
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//
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SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);
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//
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// Place AP in Hlt-loop
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//
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while (TRUE) {
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DisableInterrupts ();
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CpuSleep ();
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CpuPause ();
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}
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}
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ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;
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while (TRUE) {
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DisableInterrupts ();
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if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {
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//
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// Place AP in Mwait-loop
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//
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AsmMonitor ((UINTN)ApStartupSignalBuffer, 0, 0);
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if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {
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//
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// If AP start-up signal is not set, place AP into
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// the maximum C-state
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//
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AsmMwait (PeiCpuMpData->ApTargetCState << 4, 0);
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}
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} else if (PeiCpuMpData->ApLoopMode == ApInRunLoop) {
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//
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// Place AP in Run-loop
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//
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CpuPause ();
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} else {
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ASSERT (FALSE);
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}
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//
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// If AP start-up signal is written, AP is waken up
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// otherwise place AP in loop again
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//
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if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {
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//
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// Clear AP start-up signal when AP waken up
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//
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InterlockedCompareExchange32 (
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(UINT32 *)ApStartupSignalBuffer,
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WAKEUP_AP_SIGNAL,
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0
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);
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break;
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}
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}
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}
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}
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/**
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Write AP start-up signal to wakeup AP.
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@param ApStartupSignalBuffer Pointer to AP wakeup signal
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**/
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VOID
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WriteStartupSignal (
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IN volatile UINT32 *ApStartupSignalBuffer
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)
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{
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*ApStartupSignalBuffer = WAKEUP_AP_SIGNAL;
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//
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// If AP is waken up, StartupApSignal should be cleared.
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// Otherwise, write StartupApSignal again till AP waken up.
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//
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while (InterlockedCompareExchange32 (
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(UINT32 *)ApStartupSignalBuffer,
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WAKEUP_AP_SIGNAL,
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WAKEUP_AP_SIGNAL
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) != 0) {
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CpuPause ();
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}
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}
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/**
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This function will be called by BSP to wakeup AP.
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@param PeiCpuMpData Pointer to PEI CPU MP Data
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@param Broadcast TRUE: Send broadcast IPI to all APs
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FALSE: Send IPI to AP by ApicId
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@param ProcessorNumber The handle number of specified processor
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@param Procedure The function to be invoked by AP
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@param ProcedureArgument The argument to be passed into AP function
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**/
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VOID
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WakeUpAP (
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IN PEI_CPU_MP_DATA *PeiCpuMpData,
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IN BOOLEAN Broadcast,
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IN UINTN ProcessorNumber,
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IN EFI_AP_PROCEDURE Procedure, OPTIONAL
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IN VOID *ProcedureArgument OPTIONAL
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)
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{
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volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;
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UINTN Index;
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PeiCpuMpData->ApFunction = (UINTN) Procedure;
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PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;
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PeiCpuMpData->FinishedCount = 0;
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ExchangeInfo = PeiCpuMpData->MpCpuExchangeInfo;
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ExchangeInfo->Lock = 0;
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ExchangeInfo->StackStart = PeiCpuMpData->Buffer;
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ExchangeInfo->StackSize = PeiCpuMpData->CpuApStackSize;
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ExchangeInfo->BufferStart = PeiCpuMpData->WakeupBuffer;
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ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;
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ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;
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ExchangeInfo->Cr3 = AsmReadCr3 ();
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ExchangeInfo->CFunction = (UINTN) ApCFunction;
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ExchangeInfo->NumApsExecuting = 0;
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ExchangeInfo->PeiCpuMpData = PeiCpuMpData;
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//
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// Get the BSP's data of GDT and IDT
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//
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CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));
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AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);
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if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {
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//
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// Get AP target C-state each time when waking up AP,
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// for it maybe updated by platform again
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//
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PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);
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}
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//
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// Wakeup APs per AP loop state
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//
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if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {
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if (Broadcast) {
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SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);
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} else {
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SendInitSipiSipi (
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PeiCpuMpData->CpuData[ProcessorNumber].ApicId,
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(UINT32) ExchangeInfo->BufferStart
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);
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}
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} else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||
|
|
(PeiCpuMpData->ApLoopMode == ApInRunLoop)) {
|
|
if (Broadcast) {
|
|
for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {
|
|
if (Index != PeiCpuMpData->BspNumber) {
|
|
WriteStartupSignal (PeiCpuMpData->CpuData[Index].StartupApSignal);
|
|
}
|
|
}
|
|
} else {
|
|
WriteStartupSignal (PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal);
|
|
}
|
|
} else {
|
|
ASSERT (FALSE);
|
|
}
|
|
return ;
|
|
}
|
|
|
|
/**
|
|
Get available system memory below 1MB by specified size.
|
|
|
|
@param WakeupBufferSize Wakeup buffer size required
|
|
|
|
@retval other Return wakeup buffer address below 1MB.
|
|
@retval -1 Cannot find free memory below 1MB.
|
|
**/
|
|
UINTN
|
|
GetWakeupBuffer (
|
|
IN UINTN WakeupBufferSize
|
|
)
|
|
{
|
|
EFI_PEI_HOB_POINTERS Hob;
|
|
UINTN WakeupBufferStart;
|
|
UINTN WakeupBufferEnd;
|
|
|
|
//
|
|
// Get the HOB list for processing
|
|
//
|
|
Hob.Raw = GetHobList ();
|
|
|
|
//
|
|
// Collect memory ranges
|
|
//
|
|
while (!END_OF_HOB_LIST (Hob)) {
|
|
if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
|
|
if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&
|
|
(Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
|
|
((Hob.ResourceDescriptor->ResourceAttribute &
|
|
(EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |
|
|
EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |
|
|
EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED
|
|
)) == 0)
|
|
) {
|
|
//
|
|
// Need memory under 1MB to be collected here
|
|
//
|
|
WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);
|
|
if (WakeupBufferEnd > BASE_1MB) {
|
|
//
|
|
// Wakeup buffer should be under 1MB
|
|
//
|
|
WakeupBufferEnd = BASE_1MB;
|
|
}
|
|
//
|
|
// Wakeup buffer should be aligned on 4KB
|
|
//
|
|
WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);
|
|
if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {
|
|
continue;
|
|
}
|
|
//
|
|
// Create a memory allocation HOB.
|
|
//
|
|
BuildMemoryAllocationHob (
|
|
WakeupBufferStart,
|
|
WakeupBufferSize,
|
|
EfiBootServicesData
|
|
);
|
|
return WakeupBufferStart;
|
|
}
|
|
}
|
|
//
|
|
// Find the next HOB
|
|
//
|
|
Hob.Raw = GET_NEXT_HOB (Hob);
|
|
}
|
|
|
|
return (UINTN) -1;
|
|
}
|
|
|
|
/**
|
|
Get available system memory below 1MB by specified size.
|
|
|
|
@param PeiCpuMpData Pointer to PEI CPU MP Data
|
|
**/
|
|
VOID
|
|
BackupAndPrepareWakeupBuffer(
|
|
IN PEI_CPU_MP_DATA *PeiCpuMpData
|
|
)
|
|
{
|
|
CopyMem (
|
|
(VOID *) PeiCpuMpData->BackupBuffer,
|
|
(VOID *) PeiCpuMpData->WakeupBuffer,
|
|
PeiCpuMpData->BackupBufferSize
|
|
);
|
|
CopyMem (
|
|
(VOID *) PeiCpuMpData->WakeupBuffer,
|
|
(VOID *) PeiCpuMpData->AddressMap.RendezvousFunnelAddress,
|
|
PeiCpuMpData->AddressMap.RendezvousFunnelSize
|
|
);
|
|
}
|
|
|
|
/**
|
|
Restore wakeup buffer data.
|
|
|
|
@param PeiCpuMpData Pointer to PEI CPU MP Data
|
|
**/
|
|
VOID
|
|
RestoreWakeupBuffer(
|
|
IN PEI_CPU_MP_DATA *PeiCpuMpData
|
|
)
|
|
{
|
|
CopyMem ((VOID *) PeiCpuMpData->WakeupBuffer, (VOID *) PeiCpuMpData->BackupBuffer, PeiCpuMpData->BackupBufferSize);
|
|
}
|
|
|
|
/**
|
|
This function will get CPU count in the system.
|
|
|
|
@param PeiCpuMpData Pointer to PEI CPU MP Data
|
|
|
|
@return AP processor count
|
|
**/
|
|
UINT32
|
|
CountProcessorNumber (
|
|
IN PEI_CPU_MP_DATA *PeiCpuMpData
|
|
)
|
|
{
|
|
//
|
|
// Load Microcode on BSP
|
|
//
|
|
MicrocodeDetect ();
|
|
//
|
|
// Store BSP's MTRR setting
|
|
//
|
|
MtrrGetAllMtrrs (&PeiCpuMpData->MtrrTable);
|
|
|
|
//
|
|
// Only perform AP detection if PcdCpuMaxLogicalProcessorNumber is greater than 1
|
|
//
|
|
if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {
|
|
//
|
|
// Send 1st broadcast IPI to APs to wakeup APs
|
|
//
|
|
PeiCpuMpData->InitFlag = TRUE;
|
|
PeiCpuMpData->X2ApicEnable = FALSE;
|
|
WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);
|
|
//
|
|
// Wait for AP task to complete and then exit.
|
|
//
|
|
MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
|
|
PeiCpuMpData->InitFlag = FALSE;
|
|
PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;
|
|
ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
|
|
//
|
|
// Wait for all APs finished the initialization
|
|
//
|
|
while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {
|
|
CpuPause ();
|
|
}
|
|
|
|
if (PeiCpuMpData->X2ApicEnable) {
|
|
DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));
|
|
//
|
|
// Wakeup all APs to enable x2APIC mode
|
|
//
|
|
WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);
|
|
//
|
|
// Wait for all known APs finished
|
|
//
|
|
while (PeiCpuMpData->FinishedCount < (PeiCpuMpData->CpuCount - 1)) {
|
|
CpuPause ();
|
|
}
|
|
//
|
|
// Enable x2APIC on BSP
|
|
//
|
|
SetApicMode (LOCAL_APIC_MODE_X2APIC);
|
|
}
|
|
DEBUG ((EFI_D_INFO, "APIC MODE is %d\n", GetApicMode ()));
|
|
//
|
|
// Sort BSP/Aps by CPU APIC ID in ascending order
|
|
//
|
|
SortApicId (PeiCpuMpData);
|
|
}
|
|
|
|
DEBUG ((EFI_D_INFO, "CpuMpPei: Find %d processors in system.\n", PeiCpuMpData->CpuCount));
|
|
return PeiCpuMpData->CpuCount;
|
|
}
|
|
|
|
/**
|
|
Prepare for AP wakeup buffer and copy AP reset code into it.
|
|
|
|
Get wakeup buffer below 1MB. Allocate memory for CPU MP Data and APs Stack.
|
|
|
|
@return Pointer to PEI CPU MP Data
|
|
**/
|
|
PEI_CPU_MP_DATA *
|
|
PrepareAPStartupVector (
|
|
VOID
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
UINT32 MaxCpuCount;
|
|
PEI_CPU_MP_DATA *PeiCpuMpData;
|
|
EFI_PHYSICAL_ADDRESS Buffer;
|
|
UINTN BufferSize;
|
|
UINTN WakeupBuffer;
|
|
UINTN WakeupBufferSize;
|
|
MP_ASSEMBLY_ADDRESS_MAP AddressMap;
|
|
UINT8 ApLoopMode;
|
|
UINT16 MonitorFilterSize;
|
|
UINT8 *MonitorBuffer;
|
|
UINTN Index;
|
|
|
|
AsmGetAddressMap (&AddressMap);
|
|
WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
|
|
WakeupBuffer = GetWakeupBuffer ((WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1));
|
|
ASSERT (WakeupBuffer != (UINTN) -1);
|
|
DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));
|
|
|
|
//
|
|
// Allocate Pages for APs stack, CPU MP Data, backup buffer for wakeup buffer,
|
|
// and monitor buffer if required.
|
|
//
|
|
MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);
|
|
BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)
|
|
+ WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;
|
|
ApLoopMode = GetApLoopMode (&MonitorFilterSize);
|
|
BufferSize += MonitorFilterSize * MaxCpuCount;
|
|
Status = PeiServicesAllocatePages (
|
|
EfiBootServicesData,
|
|
EFI_SIZE_TO_PAGES (BufferSize),
|
|
&Buffer
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
PeiCpuMpData = (PEI_CPU_MP_DATA *) (UINTN) (Buffer + PcdGet32 (PcdCpuApStackSize) * MaxCpuCount);
|
|
PeiCpuMpData->Buffer = (UINTN) Buffer;
|
|
PeiCpuMpData->CpuApStackSize = PcdGet32 (PcdCpuApStackSize);
|
|
PeiCpuMpData->WakeupBuffer = WakeupBuffer;
|
|
PeiCpuMpData->BackupBuffer = (UINTN)PeiCpuMpData + sizeof (PEI_CPU_MP_DATA);
|
|
PeiCpuMpData->BackupBufferSize = WakeupBufferSize;
|
|
PeiCpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN) (WakeupBuffer + AddressMap.RendezvousFunnelSize);
|
|
|
|
PeiCpuMpData->CpuCount = 1;
|
|
PeiCpuMpData->BspNumber = 0;
|
|
PeiCpuMpData->CpuData = (PEI_CPU_DATA *) (PeiCpuMpData->BackupBuffer +
|
|
PeiCpuMpData->BackupBufferSize);
|
|
PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();
|
|
PeiCpuMpData->CpuData[0].Health.Uint32 = 0;
|
|
PeiCpuMpData->EndOfPeiFlag = FALSE;
|
|
InitializeSpinLock(&PeiCpuMpData->MpLock);
|
|
SaveVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters);
|
|
CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
|
|
//
|
|
// Initialize AP loop mode
|
|
//
|
|
PeiCpuMpData->ApLoopMode = ApLoopMode;
|
|
DEBUG ((EFI_D_INFO, "AP Loop Mode is %d\n", PeiCpuMpData->ApLoopMode));
|
|
MonitorBuffer = (UINT8 *)(PeiCpuMpData->CpuData + MaxCpuCount);
|
|
if (PeiCpuMpData->ApLoopMode != ApInHltLoop) {
|
|
//
|
|
// Set up APs wakeup signal buffer
|
|
//
|
|
for (Index = 0; Index < MaxCpuCount; Index++) {
|
|
PeiCpuMpData->CpuData[Index].StartupApSignal =
|
|
(UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);
|
|
}
|
|
}
|
|
//
|
|
// Backup original data and copy AP reset code in it
|
|
//
|
|
BackupAndPrepareWakeupBuffer(PeiCpuMpData);
|
|
|
|
return PeiCpuMpData;
|
|
}
|
|
|
|
/**
|
|
Notify function on End Of Pei PPI.
|
|
|
|
On S3 boot, this function will restore wakeup buffer data.
|
|
On normal boot, this function will flag wakeup buffer to be un-used type.
|
|
|
|
@param PeiServices The pointer to the PEI Services Table.
|
|
@param NotifyDescriptor Address of the notification descriptor data structure.
|
|
@param Ppi Address of the PPI that was installed.
|
|
|
|
@retval EFI_SUCCESS When everything is OK.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
CpuMpEndOfPeiCallback (
|
|
IN EFI_PEI_SERVICES **PeiServices,
|
|
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
|
|
IN VOID *Ppi
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
EFI_BOOT_MODE BootMode;
|
|
PEI_CPU_MP_DATA *PeiCpuMpData;
|
|
EFI_PEI_HOB_POINTERS Hob;
|
|
EFI_HOB_MEMORY_ALLOCATION *MemoryHob;
|
|
|
|
DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invoked\n"));
|
|
|
|
Status = PeiServicesGetBootMode (&BootMode);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
PeiCpuMpData = GetMpHobData ();
|
|
ASSERT (PeiCpuMpData != NULL);
|
|
|
|
if (BootMode != BOOT_ON_S3_RESUME) {
|
|
//
|
|
// Get the HOB list for processing
|
|
//
|
|
Hob.Raw = GetHobList ();
|
|
//
|
|
// Collect memory ranges
|
|
//
|
|
while (!END_OF_HOB_LIST (Hob)) {
|
|
if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {
|
|
MemoryHob = Hob.MemoryAllocation;
|
|
if(MemoryHob->AllocDescriptor.MemoryBaseAddress == PeiCpuMpData->WakeupBuffer) {
|
|
//
|
|
// Flag this HOB type to un-used
|
|
//
|
|
GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;
|
|
break;
|
|
}
|
|
}
|
|
Hob.Raw = GET_NEXT_HOB (Hob);
|
|
}
|
|
} else {
|
|
RestoreWakeupBuffer (PeiCpuMpData);
|
|
PeiCpuMpData->EndOfPeiFlag = TRUE;
|
|
}
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
The Entry point of the MP CPU PEIM.
|
|
|
|
This function will wakeup APs and collect CPU AP count and install the
|
|
Mp Service Ppi.
|
|
|
|
@param FileHandle Handle of the file being invoked.
|
|
@param PeiServices Describes the list of possible PEI Services.
|
|
|
|
@retval EFI_SUCCESS MpServicePpi is installed successfully.
|
|
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
CpuMpPeimInit (
|
|
IN EFI_PEI_FILE_HANDLE FileHandle,
|
|
IN CONST EFI_PEI_SERVICES **PeiServices
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
PEI_CPU_MP_DATA *PeiCpuMpData;
|
|
EFI_VECTOR_HANDOFF_INFO *VectorInfo;
|
|
EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
|
|
|
|
//
|
|
// Load new GDT table on BSP
|
|
//
|
|
AsmInitializeGdt (&mGdt);
|
|
//
|
|
// Get Vector Hand-off Info PPI
|
|
//
|
|
VectorInfo = NULL;
|
|
Status = PeiServicesLocatePpi (
|
|
&gEfiVectorHandoffInfoPpiGuid,
|
|
0,
|
|
NULL,
|
|
(VOID **)&VectorHandoffInfoPpi
|
|
);
|
|
if (Status == EFI_SUCCESS) {
|
|
VectorInfo = VectorHandoffInfoPpi->Info;
|
|
}
|
|
Status = InitializeCpuExceptionHandlers (VectorInfo);
|
|
ASSERT_EFI_ERROR (Status);
|
|
//
|
|
// Get wakeup buffer and copy AP reset code in it
|
|
//
|
|
PeiCpuMpData = PrepareAPStartupVector ();
|
|
//
|
|
// Count processor number and collect processor information
|
|
//
|
|
CountProcessorNumber (PeiCpuMpData);
|
|
//
|
|
// Build location of PEI CPU MP DATA buffer in HOB
|
|
//
|
|
BuildGuidDataHob (
|
|
&gEfiCallerIdGuid,
|
|
(VOID *)&PeiCpuMpData,
|
|
sizeof(UINT64)
|
|
);
|
|
//
|
|
// Update and publish CPU BIST information
|
|
//
|
|
CollectBistDataFromPpi (PeiServices, PeiCpuMpData);
|
|
//
|
|
// register an event for EndOfPei
|
|
//
|
|
Status = PeiServicesNotifyPpi (&mNotifyList);
|
|
ASSERT_EFI_ERROR (Status);
|
|
//
|
|
// Install CPU MP PPI
|
|
//
|
|
Status = PeiServicesInstallPpi(&mPeiCpuMpPpiDesc);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
return Status;
|
|
}
|