mirror of https://github.com/acidanthera/audk.git
7779209971
V3: Call XhcFreeUrb after XhcCreateTransferTrb fails in XhcCreateTrb. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1274 In current code, XhcMonitorAsyncRequests (timer handler) will do unmap and map operations for AsyncIntTransfers to "Flush data from PCI controller specific address to mapped system memory address". XhcMonitorAsyncRequests XhcFlushAsyncIntMap PciIo->Unmap IoMmu->SetAttribute PciIo->Map IoMmu->SetAttribute This may impact the boot performance. Since the data buffer for XhcMonitorAsyncRequests is internal buffer, we can allocate common buffer by PciIo->AllocateBuffer and map the buffer with EfiPciIoOperationBusMasterCommonBuffer, then the unmap and map operations can be removed. /// /// Provides both read and write access to system memory by /// both the processor and a bus master. The buffer is coherent /// from both the processor's and the bus master's point of view. /// EfiPciIoOperationBusMasterCommonBuffer, Test done: USB KB works normally. USB disk read/write works normally. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> |
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| .. | ||
| ComponentName.c | ||
| ComponentName.h | ||
| UsbHcMem.c | ||
| UsbHcMem.h | ||
| Xhci.c | ||
| Xhci.h | ||
| XhciDxe.inf | ||
| XhciDxe.uni | ||
| XhciDxeExtra.uni | ||
| XhciReg.c | ||
| XhciReg.h | ||
| XhciSched.c | ||
| XhciSched.h | ||