mirror of https://github.com/acidanthera/audk.git
190 lines
7.8 KiB
C
190 lines
7.8 KiB
C
/** @file
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This PPI provides the super I/O register access functionality.
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Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This PPI is from PI Version 1.2.1.
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**/
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#ifndef __EFI_SUPER_IO_PPI_H__
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#define __EFI_SUPER_IO_PPI_H__
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#include <Protocol/SuperIo.h>
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#define EFI_SIO_PPI_GUID \
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{ \
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0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22} \
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}
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typedef struct _EFI_SIO_PPI EFI_SIO_PPI;
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typedef struct _EFI_SIO_PPI *PEFI_SIO_PPI;
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typedef UINT16 EFI_SIO_REGISTER;
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#define EFI_SIO_REG(ldn,reg) (EFI_SIO_REGISTER) (((ldn) << 8) | reg)
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#define EFI_SIO_LDN_GLOBAL 0xFF
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/**
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Read a Super I/O register.
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The register is specified as an 8-bit logical device number and an 8-bit
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register value. The logical device numbers for specific SIO devices can be
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determined using the Info member of the PPI structure.
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@param PeiServices A pointer to a pointer to the PEI Services.
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@param This A pointer to this instance of the EFI_SIO_PPI.
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@param ExitCfgMode A boolean specifying whether the driver should turn on
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configuration mode (FALSE) or turn off configuration mode
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(TRUE) after completing the read operation. The driver must
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track the current state of the configuration mode (if any)
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and turn on configuration mode (if necessary) prior to
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register access.
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@param Register A value specifying the logical device number (bits 15:8)
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and the register to read (bits 7:0). The logical device
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number of EFI_SIO_LDN_GLOBAL indicates that global
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registers will be used.
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@param IoData A pointer to the returned register value.
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@retval EFI_SUCCESS Success.
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@retval EFI_TIMEOUT The register could not be read in the a reasonable
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amount of time. The exact time is device-specific.
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@retval EFI_INVALID_PARAMETERS Register was out of range for this device.
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@retval EFI_INVALID_PARAMETERS IoData was NULL
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@retval EFI_DEVICE_ERROR There was a device fault or the device was not present.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_SIO_REGISTER_READ)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_SIO_PPI *This,
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IN BOOLEAN ExitCfgMode,
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IN EFI_SIO_REGISTER Register,
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OUT UINT8 *IoData
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);
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/**
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Write a Super I/O register.
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The register is specified as an 8-bit logical device number and an 8-bit register
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value. The logical device numbers for specific SIO devices can be determined
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using the Info member of the PPI structure.
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@param PeiServices A pointer to a pointer to the PEI Services.
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@param This A pointer to this instance of the EFI_SIO_PPI.
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@param ExitCfgMode A boolean specifying whether the driver should turn on
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configuration mode (FALSE) or turn off configuration mode
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(TRUE) after completing the read operation. The driver must
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track the current state of the configuration mode (if any)
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and turn on configuration mode (if necessary) prior to
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register access.
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@param Register A value specifying the logical device number (bits 15:8)
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and the register to read (bits 7:0). The logical device
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number of EFI_SIO_LDN_GLOBAL indicates that global
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registers will be used.
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@param IoData A pointer to the returned register value.
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@retval EFI_SUCCESS Success.
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@retval EFI_TIMEOUT The register could not be read in the a reasonable
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amount of time. The exact time is device-specific.
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@retval EFI_INVALID_PARAMETERS Register was out of range for this device.
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@retval EFI_INVALID_PARAMETERS IoData was NULL
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@retval EFI_DEVICE_ERROR There was a device fault or the device was not present.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_SIO_REGISTER_WRITE)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_SIO_PPI *This,
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IN BOOLEAN ExitCfgMode,
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IN EFI_SIO_REGISTER Register,
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IN UINT8 IoData
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);
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/**
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Provides an interface for a table based programming of the Super I/O registers.
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The Modify() function provides an interface for table based programming of the
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Super I/O registers. This function can be used to perform programming of
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multiple Super I/O registers with a single function call. For each table entry,
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the Register is read, its content is bitwise ANDed with AndMask, and then ORed
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with OrMask before being written back to the Register. The Super I/O driver
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must track the current state of the Super I/O and enable the configuration mode
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of Super I/O if necessary prior to table processing. Once the table is processed,
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the Super I/O device must be returned to the original state.
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@param PeiServices A pointer to a pointer to the PEI Services.
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@param This A pointer to this instance of the EFI_SIO_PPI.
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@param Command A pointer to an array of NumberOfCommands EFI_SIO_REGISTER_MODIFY
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structures. Each structure specifies a single Super I/O register
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modify operation.
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@param NumberOfCommands The number of elements in the Command array.
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@retval EFI_SUCCESS The operation completed successfully.
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@retval EFI_INVALID_PARAMETERS Command is NULL.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_SIO_REGISTER_MODIFY)(
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IN EFI_PEI_SERVICES **PeiServices,
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IN CONST EFI_SIO_PPI *This,
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IN CONST EFI_SIO_REGISTER_MODIFY *Command,
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IN UINTN NumberOfCommands
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);
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///
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/// Specifies the end of the information list.
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///
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#define EFI_ACPI_PNP_HID_END EFI_PNP_ID (0x0000)
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typedef UINT32 EFI_ACPI_HID;
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typedef UINT32 EFI_ACPI_UID;
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#pragma pack(1)
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typedef struct _EFI_SIO_INFO {
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EFI_ACPI_HID Hid;
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EFI_ACPI_UID Uid;
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UINT8 Ldn;
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} EFI_SIO_INFO, *PEFI_SIO_INFO;
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#pragma pack()
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///
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/// This PPI provides low-level access to Super I/O registers using Read() and
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/// Write(). It also uniquely identifies this Super I/O controller using a GUID
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/// and provides mappings between ACPI style PNP IDs and the logical device numbers.
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/// There is one instance of this PPI per Super I/O device.
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///
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struct _EFI_SIO_PPI {
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///
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/// This function reads a register's value from the Super I/O controller.
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///
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EFI_PEI_SIO_REGISTER_READ Read;
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///
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/// This function writes a value to a register in the Super I/O controller.
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///
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EFI_PEI_SIO_REGISTER_WRITE Write;
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///
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/// This function modifies zero or more registers in the Super I/O controller
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/// using a table.
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///
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EFI_PEI_SIO_REGISTER_MODIFY Modify;
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///
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/// This GUID uniquely identifies the Super I/O controller.
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///
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EFI_GUID SioGuid;
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///
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/// This pointer is to an array which maps EISA identifiers to logical devices numbers.
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///
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PEFI_SIO_INFO Info;
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};
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extern EFI_GUID gEfiSioPpiGuid;
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#endif
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