mirror of https://github.com/acidanthera/audk.git
86 lines
2.5 KiB
C
86 lines
2.5 KiB
C
/*++
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Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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SlotConfig.c
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Abstract:
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Sets platform/SKU specific expansion slot information.
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--*/
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#include "PlatformDxe.h"
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#include <Protocol/SmbiosSlotPopulation.h>
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#include <IndustryStandard/Pci22.h>
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//
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// Default bus number for the bridge
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//
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#define DEF_BUS_CONFIG 0x0101
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#define DEF_BUS 0x01
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//
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// Data structures for slot information
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//
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typedef struct {
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UINT16 SmbiosSlotId;
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UINT8 Bus;
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UINT8 Dev;
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UINT8 Function;
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UINT8 TargetDevice;
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} EFI_PCI_SLOT_BRIDGE_INFO;
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//
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// Product specific bridge to slot routing information
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//
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EFI_PCI_SLOT_BRIDGE_INFO mSlotBridgeTable[] = {
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{
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0x01, //PCIe x1 ICH (Bridge B0:D28:F1)
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DEFAULT_PCI_BUS_NUMBER_PCH,
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PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS,
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PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2,
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0
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}
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};
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UINTN mSlotBridgeTableSize =
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sizeof(mSlotBridgeTable) / sizeof(EFI_PCI_SLOT_BRIDGE_INFO);
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//
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// Slot entry table for IBX RVP
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//
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EFI_SMBIOS_SLOT_ENTRY mSlotEntries[] = {
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{0x06, FALSE, TRUE}, // PCIe x16 Slot 1 (NOT USED)
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{0x04, FALSE, TRUE}, // PCIe x16 Slot 2 (NOT USED)
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{0x03, FALSE, TRUE}, // PCIe x4 Slot (NOT USED)
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{0x02, FALSE, FALSE}, // Mini PCIe x1 Slot
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{0x15, FALSE, TRUE}, // PCIe x1 Slot 2 (NOT USED)
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{0x16, FALSE, TRUE}, // PCIe x1 Slot 3 (NOT USED)
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{0x07, FALSE, FALSE}, // PCI Slot 1
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{0x18, FALSE, TRUE}, // PCI Slot 2 (NOT USED)
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{0x17, FALSE, TRUE}, // PCI Slot 3 (NOT USED)
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};
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EFI_SMBIOS_SLOT_POPULATION_INFO mSlotInformation = {
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sizeof(mSlotEntries) / sizeof(EFI_SMBIOS_SLOT_ENTRY),
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mSlotEntries
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};
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