mirror of https://github.com/acidanthera/audk.git
246 lines
8.6 KiB
C
246 lines
8.6 KiB
C
/** @file
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Definitions for CPU S3 data.
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Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _ACPI_CPU_DATA_H_
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#define _ACPI_CPU_DATA_H_
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//
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// This macro definition is used to fix incompatibility issue caused by
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// ACPI_CPU_DATA structure update. It will be removed after all the platform
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// code uses new ACPI_CPU_DATA structure.
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//
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#define ACPI_CPU_DATA_STRUCTURE_UPDATE
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//
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// Register types in register table
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//
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typedef enum {
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Msr,
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ControlRegister,
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MemoryMapped,
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CacheControl,
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//
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// Semaphore type used to control the execute sequence of the Msr.
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// It will be insert between two Msr which has execute dependence.
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//
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Semaphore,
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InvalidReg
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} REGISTER_TYPE;
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//
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// Describe the dependency type for different features.
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// The value set to CPU_REGISTER_TABLE_ENTRY.Value when the REGISTER_TYPE is Semaphore.
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//
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typedef enum {
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NoneDepType,
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ThreadDepType,
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CoreDepType,
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PackageDepType,
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InvalidDepType
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} CPU_FEATURE_DEPENDENCE_TYPE;
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//
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// CPU information.
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//
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typedef struct {
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//
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// Record the package count in this CPU.
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//
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UINT32 PackageCount;
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//
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// Record the max core count in this CPU.
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// Different packages may have different core count, this value
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// save the max core count in all the packages.
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//
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UINT32 MaxCoreCount;
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//
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// Record the max thread count in this CPU.
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// Different cores may have different thread count, this value
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// save the max thread count in all the cores.
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//
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UINT32 MaxThreadCount;
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//
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// This field points to an array.
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// This array saves thread count (type UINT32) of each package.
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// The array has PackageCount elements.
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//
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// If the platform does not support MSR setting at S3 resume, and
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// therefore it doesn't need the dependency semaphores, it should set
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// this field to 0.
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//
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EFI_PHYSICAL_ADDRESS ThreadCountPerPackage;
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//
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// This field points to an array.
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// This array saves thread count (type UINT8) of each core.
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// The array has PackageCount * MaxCoreCount elements.
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//
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// If the platform does not support MSR setting at S3 resume, and
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// therefore it doesn't need the dependency semaphores, it should set
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// this field to 0.
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//
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EFI_PHYSICAL_ADDRESS ThreadCountPerCore;
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} CPU_STATUS_INFORMATION;
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//
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// Element of register table entry
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//
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typedef struct {
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REGISTER_TYPE RegisterType; // offset 0 - 3
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UINT32 Index; // offset 4 - 7
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UINT8 ValidBitStart; // offset 8
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UINT8 ValidBitLength; // offset 9
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BOOLEAN TestThenWrite; // offset 10
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UINT8 Reserved1; // offset 11
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UINT32 HighIndex; // offset 12-15, only valid for MemoryMapped
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UINT64 Value; // offset 16-23
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} CPU_REGISTER_TABLE_ENTRY;
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//
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// Register table definition, including current table length,
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// allocated size of this table, and pointer to the list of table entries.
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//
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typedef struct {
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//
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// The number of valid entries in the RegisterTableEntry buffer
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//
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UINT32 TableLength;
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UINT32 NumberBeforeReset;
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//
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// The size, in bytes, of the RegisterTableEntry buffer
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//
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UINT32 AllocatedSize;
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//
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// The initial APIC ID of the CPU this register table applies to
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//
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UINT32 InitialApicId;
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//
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// Physical address of CPU_REGISTER_TABLE_ENTRY structures.
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//
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EFI_PHYSICAL_ADDRESS RegisterTableEntry;
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} CPU_REGISTER_TABLE;
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//
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// Data structure that is used for CPU feature initialization during ACPI S3
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// resume.
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//
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typedef struct {
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//
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// Physical address of an array of CPU_REGISTER_TABLE structures, with
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// NumberOfCpus entries. If a register table is not required, then the
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// TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
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// If TableLength is > 0, then elements of RegisterTableEntry are used to
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// initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
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// before SMBASE relocation is performed.
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// If a register table is not required for any one of the CPUs, then
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// PreSmmInitRegisterTable may be set to 0.
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//
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EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;
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//
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// Physical address of an array of CPU_REGISTER_TABLE structures, with
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// NumberOfCpus entries. If a register table is not required, then the
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// TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
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// If TableLength is > 0, then elements of RegisterTableEntry are used to
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// initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
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// after SMBASE relocation is performed.
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// If a register table is not required for any one of the CPUs, then
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// RegisterTable may be set to 0.
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//
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EFI_PHYSICAL_ADDRESS RegisterTable;
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//
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// CPU information which is required when set the register table.
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//
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CPU_STATUS_INFORMATION CpuStatus;
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//
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// Location info for each AP.
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// It points to an array which saves all APs location info.
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// The array count is the AP count in this CPU.
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//
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// If the platform does not support MSR setting at S3 resume, and
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// therefore it doesn't need the dependency semaphores, it should set
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// this field to 0.
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//
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EFI_PHYSICAL_ADDRESS ApLocation;
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} CPU_FEATURE_INIT_DATA;
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//
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// Data structure that is required for ACPI S3 resume. The PCD
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// PcdCpuS3DataAddress must be set to the physical address where this structure
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// is allocated
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//
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typedef struct {
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//
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// Physical address of 4KB buffer allocated below 1MB from memory of type
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// EfiReservedMemoryType. The buffer is not required to be initialized, but
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// it is recommended that the buffer be zero-filled. This buffer is used to
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// wake APs during an ACPI S3 resume.
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//
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EFI_PHYSICAL_ADDRESS StartupVector;
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//
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// Physical address of structure of type IA32_DESCRIPTOR. The
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// IA32_DESCRIPTOR structure provides the base address and length of a GDT
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// The GDT must be filled in with the GDT contents that are
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// used during an ACPI S3 resume. This is typically the contents of the GDT
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// used by the boot processor when the platform is booted.
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//
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EFI_PHYSICAL_ADDRESS GdtrProfile;
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//
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// Physical address of structure of type IA32_DESCRIPTOR. The
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// IA32_DESCRIPTOR structure provides the base address and length of an IDT.
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// The IDT must be filled in with the IDT contents that are
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// used during an ACPI S3 resume. This is typically the contents of the IDT
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// used by the boot processor when the platform is booted.
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//
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EFI_PHYSICAL_ADDRESS IdtrProfile;
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//
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// Physical address of a buffer that is used as stacks during ACPI S3 resume.
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// The total size of this buffer, in bytes, is NumberOfCpus * StackSize. This
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// structure must be allocated from memory of type EfiACPIMemoryNVS.
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//
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EFI_PHYSICAL_ADDRESS StackAddress;
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//
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// The size, in bytes, of the stack provided to each CPU during ACPI S3 resume.
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//
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UINT32 StackSize;
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//
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// The number of CPUs. If a platform does not support hot plug CPUs, then
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// this is the number of CPUs detected when the platform is booted, regardless
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// of being enabled or disabled. If a platform does support hot plug CPUs,
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// then this is the maximum number of CPUs that the platform supports.
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//
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UINT32 NumberOfCpus;
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//
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// Physical address of structure of type MTRR_SETTINGS that contains a copy
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// of the MTRR settings that are compatible with the MTRR settings used by
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// the boot processor when the platform was booted. These MTRR settings are
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// used during an ACPI S3 resume.
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//
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EFI_PHYSICAL_ADDRESS MtrrTable;
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//
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// Physical address of a buffer that contains the machine check handler that
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// is used during an ACPI S3 Resume. In order for this machine check
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// handler to be active on an AP during an ACPI S3 resume, the machine check
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// vector in the IDT provided by IdtrProfile must be initialized to transfer
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// control to this physical address.
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//
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EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase;
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//
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// The size, in bytes, of the machine check handler that is used during an
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// ACPI S3 Resume. If this field is 0, then a machine check handler is not
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// provided.
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//
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UINT32 ApMachineCheckHandlerSize;
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//
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// Data structure that is used for CPU feature initialization during ACPI S3
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// resume.
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//
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CPU_FEATURE_INIT_DATA CpuFeatureInitData;
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} ACPI_CPU_DATA;
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#endif
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