mirror of https://github.com/acidanthera/audk.git
347 lines
11 KiB
Plaintext
347 lines
11 KiB
Plaintext
## @file
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# Open Virtual Machine Firmware: FDF
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#
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# Copyright (c) 2006 - 2010, Intel Corporation
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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################################################################################
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[FD.SEC]
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BaseAddress = 0xFFFEE000
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Size = 0x00012000
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ErasePolarity = 1
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BlockSize = 0x1000
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NumBlocks = 0x12
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0x0|0x12000
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FV = SECFV
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################################################################################
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[FD.MEMFD]
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BaseAddress = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
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Size = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
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ErasePolarity = 1
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BlockSize = 0x10000
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NumBlocks = 0x40
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0x0|0x400000
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FV = MAINFV
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################################################################################
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[FV.SECFV]
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BlockSize = 0x1000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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#
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# SEC Phase modules
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#
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# The code in this FV handles the initial firmware startup, and
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# decompresses the MAINFV which handles the majority of the boot sequence.
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#
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INF OvmfPkg/Sec/SecMain.inf
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INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
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################################################################################
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[FV.MAINFV]
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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#
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# Files to be placed in MAIN FV
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#
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# This firmware volume will have files placed in it uncompressed,
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# and then then entire firmware volume will be compressed in a
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# single compression operation in order to achieve better
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# overall compression.
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#
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APRIORI PEI {
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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}
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#
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# PEI Phase modules
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#
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INF MdeModulePkg/Core/Pei/PeiMain.inf
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
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INF OvmfPkg/PlatformPei/PlatformPei.inf
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INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
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FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {
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SECTION FV_IMAGE = DXEFV
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}
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################################################################################
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[FV.DXEFV]
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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APRIORI DXE {
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INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
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INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
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}
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#
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# DXE Phase modules
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#
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INF MdeModulePkg/Core/Dxe/DxeMain.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
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INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
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INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
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INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
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INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
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INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
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INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
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INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
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INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
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INF UefiCpuPkg/CpuDxe/CpuDxe.inf
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INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
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INF PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
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INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
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INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
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INF MdeModulePkg/Universal/Metronome/Metronome.inf
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INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
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INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
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INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
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INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
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INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
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INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
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INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
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INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
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INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
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INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
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INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
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INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
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INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
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INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
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INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
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INF PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
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INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
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INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
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INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
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INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
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INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
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INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
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INF FatBinPkg/EnhancedFatDxe/Fat.inf
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INF EdkShellBinPkg/FullShell/FullShell.inf
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FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
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SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress
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SECTION RAW = MdeModulePkg/Logo/Logo.bmp
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}
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}
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################################################################################
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[FV.OVMF]
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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#
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# This file contains the compressed MAINFV, which is compressed
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# in a single compression operation in order to achieve better
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# overall compression.
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#
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FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {
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SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress
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SECTION FV_IMAGE = MAINFV
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}
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}
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#
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# This file contains the uncompressed SECFV, which contains the initial
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# boot code. The code in this FV decompresses the MAINFV.
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#
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# It uses the Volume Top File (VTF) GUID so it will be placed at the
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# end of the FV.
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#
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FILE FREEFORM = 1BA0062E-C779-4582-8566-336AE8F78F09 {
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SECTION Align=16 FV_IMAGE = SECFV
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}
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################################################################################
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[Rule.Common.PEI_CORE]
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FILE PEI_CORE = $(NAMED_GUID) {
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PE32 PE32 Align=32 |.efi
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UI STRING ="$(MODULE_NAME)" Optional
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VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.SEC]
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FILE SEC = $(NAMED_GUID) {
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PE32 PE32 |.efi
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UI STRING ="$(MODULE_NAME)" Optional
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VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.PEIM.NORELOC]
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FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {
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PEI_DEPEX PEI_DEPEX Optional |.depex
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TE TE |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.PEIM]
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FILE PEIM = $(NAMED_GUID) {
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PEI_DEPEX PEI_DEPEX Optional |.depex
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PE32 PE32 Align=32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.PEIM.TIANOCOMPRESSED]
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FILE PEIM = $(NAMED_GUID) {
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PEI_DEPEX PEI_DEPEX Optional |.depex
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GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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}
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[Rule.Common.DXE_CORE]
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FILE DXE_CORE = $(NAMED_GUID) {
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.UEFI_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional |.depex
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.DXE_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional |.depex
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.DXE_RUNTIME_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional |.depex
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.UEFI_APPLICATION]
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FILE APPLICATION = $(NAMED_GUID) {
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.USER_DEFINED.ACPITABLE]
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FILE FREEFORM = $(NAMED_GUID) {
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RAW ACPI |.acpi
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RAW ASL |.aml
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}
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[Rule.Common.SEC.RESET_VECTOR]
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FILE RAW = $(NAMED_GUID) {
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RAW RAW |.raw
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}
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[OptionRom.CirrusLogic5446]
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INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {
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PCI_DEVICE_ID = 0x00B8
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}
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