Star Zeng e91797885a IntelSiliconPkg MicrocodeUpdateDxe: Honor FIT table ... It is the second step for https://bugzilla.tianocore.org/show_bug.cgi?id=540. V2: Use error handling instead of ASSERT for FIT table checking result. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>		2018-05-09 16:27:30 +08:00
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Feature	IntelSiliconPkg MicrocodeUpdateDxe: Honor FIT table	2018-05-09 16:27:30 +08:00
Include	IntelSiliconPkg: Move MicrocodeUpdate from UefiCpuPkg	2017-11-30 09:25:28 +08:00
Library/DxeSmbiosDataHobLib	IntelSiliconPkg: Fix format issues	2016-12-20 10:51:16 +08:00
IntelSiliconPkg.dec	IntelSiliconPkg VTdPmrPei: Add PcdVTdPeiDmaBufferSize(S3)	2018-03-06 22:31:49 +08:00
IntelSiliconPkg.dsc	IntelSiliconPkg: Update MicrocodeUpdate build path in dsc	2017-12-01 09:31:52 +08:00