mirror of https://github.com/acidanthera/audk.git
399 lines
12 KiB
NASM
399 lines
12 KiB
NASM
;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpFuncs.nasm
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;
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; Abstract:
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;
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; This is the assembly code for MP support
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;
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;-------------------------------------------------------------------------------
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%include "MpEqu.inc"
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extern ASM_PFX(InitializeFloatingPointUnits)
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DEFAULT REL
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SECTION .text
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;-------------------------------------------------------------------------------------
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;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
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;procedure serializes all the AP processors through an Init sequence. It must be
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;noted that APs arrive here very raw...ie: real mode, no stack.
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;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
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;IS IN MACHINE CODE.
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;-------------------------------------------------------------------------------------
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global ASM_PFX(RendezvousFunnelProc)
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ASM_PFX(RendezvousFunnelProc):
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RendezvousFunnelProcStart:
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; At this point CS = 0x(vv00) and ip= 0x0.
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; Save BIST information to ebp firstly
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BITS 16
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mov ebp, eax ; Save BIST information
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mov ax, cs
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mov ds, ax
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mov es, ax
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mov ss, ax
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xor ax, ax
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mov fs, ax
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mov gs, ax
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mov si, BufferStartLocation
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mov ebx, [si]
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mov di, ModeOffsetLocation
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mov eax, [di]
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mov di, CodeSegmentLocation
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mov edx, [di]
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mov di, ax
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sub di, 02h
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mov [di],dx ; Patch long mode CS
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sub di, 04h
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add eax, ebx
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mov [di],eax ; Patch address
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mov si, GdtrLocation
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o32 lgdt [cs:si]
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mov si, IdtrLocation
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o32 lidt [cs:si]
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mov si, EnableExecuteDisableLocation
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cmp byte [si], 0
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jz SkipEnableExecuteDisableBit
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;
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; Enable execute disable bit
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;
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mov ecx, 0c0000080h ; EFER MSR number
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rdmsr ; Read EFER
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bts eax, 11 ; Enable Execute Disable Bit
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wrmsr ; Write EFER
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SkipEnableExecuteDisableBit:
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mov di, DataSegmentLocation
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mov edi, [di] ; Save long mode DS in edi
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mov si, Cr3Location ; Save CR3 in ecx
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mov ecx, [si]
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xor ax, ax
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mov ds, ax ; Clear data segment
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mov eax, cr0 ; Get control register 0
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or eax, 000000003h ; Set PE bit (bit #0) & MP
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mov cr0, eax
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mov eax, cr4
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bts eax, 5
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mov cr4, eax
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mov cr3, ecx ; Load CR3
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mov ecx, 0c0000080h ; EFER MSR number
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rdmsr ; Read EFER
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bts eax, 8 ; Set LME=1
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wrmsr ; Write EFER
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mov eax, cr0 ; Read CR0
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bts eax, 31 ; Set PG=1
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mov cr0, eax ; Write CR0
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jmp 0:strict dword 0 ; far jump to long mode
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BITS 64
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LongModeStart:
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mov eax, edi
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mov ds, ax
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mov es, ax
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mov ss, ax
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mov esi, ebx
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lea edi, [esi + InitFlagLocation]
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cmp qword [edi], 1 ; ApInitConfig
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jnz GetApicId
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; AP init
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mov edi, esi
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add edi, LockLocation
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mov rax, NotVacantFlag
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TestLock:
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xchg qword [edi], rax
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cmp rax, NotVacantFlag
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jz TestLock
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lea ecx, [esi + NumApsExecutingLocation]
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inc dword [ecx]
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mov ebx, [ecx]
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Releaselock:
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mov rax, VacantFlag
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xchg qword [edi], rax
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; program stack
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mov edi, esi
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add edi, StackSizeLocation
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mov eax, dword [edi]
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mov ecx, ebx
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inc ecx
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mul ecx ; EAX = StackSize * (CpuNumber + 1)
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mov edi, esi
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add edi, StackStartAddressLocation
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add rax, qword [edi]
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mov rsp, rax
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jmp CProcedureInvoke
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GetApicId:
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mov eax, 0
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cpuid
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cmp eax, 0bh
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jb NoX2Apic ; CPUID level below CPUID_EXTENDED_TOPOLOGY
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mov eax, 0bh
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xor ecx, ecx
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cpuid
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test ebx, 0ffffh
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jz NoX2Apic ; CPUID.0BH:EBX[15:0] is zero
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; Processor is x2APIC capable; 32-bit x2APIC ID is already in EDX
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jmp GetProcessorNumber
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NoX2Apic:
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; Processor is not x2APIC capable, so get 8-bit APIC ID
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mov eax, 1
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cpuid
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shr ebx, 24
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mov edx, ebx
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GetProcessorNumber:
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;
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; Get processor number for this AP
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; Note that BSP may become an AP due to SwitchBsp()
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;
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xor ebx, ebx
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lea eax, [esi + CpuInfoLocation]
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mov edi, [eax]
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GetNextProcNumber:
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cmp dword [edi], edx ; APIC ID match?
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jz ProgramStack
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add edi, 20
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inc ebx
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jmp GetNextProcNumber
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ProgramStack:
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mov rsp, qword [edi + 12]
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CProcedureInvoke:
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push rbp ; Push BIST data at top of AP stack
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xor rbp, rbp ; Clear ebp for call stack trace
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push rbp
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mov rbp, rsp
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mov rax, qword [esi + InitializeFloatingPointUnitsAddress]
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sub rsp, 20h
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call rax ; Call assembly function to initialize FPU per UEFI spec
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add rsp, 20h
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mov edx, ebx ; edx is NumApsExecuting
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mov ecx, esi
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add ecx, LockLocation ; rcx is address of exchange info data buffer
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mov edi, esi
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add edi, ApProcedureLocation
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mov rax, qword [edi]
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sub rsp, 20h
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call rax ; Invoke C function
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add rsp, 20h
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jmp $ ; Should never reach here
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RendezvousFunnelProcEnd:
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;-------------------------------------------------------------------------------------
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; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish);
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;-------------------------------------------------------------------------------------
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global ASM_PFX(AsmRelocateApLoop)
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ASM_PFX(AsmRelocateApLoop):
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AsmRelocateApLoopStart:
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mov rax, [rsp + 40] ; CountTofinish
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lock dec dword [rax] ; (*CountTofinish)--
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mov rsp, r9
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push rcx
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push rdx
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lea rsi, [PmEntry] ; rsi <- The start address of transition code
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push r8
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push rsi
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DB 0x48
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retf
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BITS 32
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PmEntry:
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mov eax, cr0
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btr eax, 31 ; Clear CR0.PG
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mov cr0, eax ; Disable paging and caches
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mov ebx, edx ; Save EntryPoint to rbx, for rdmsr will overwrite rdx
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mov ecx, 0xc0000080
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rdmsr
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and ah, ~ 1 ; Clear LME
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wrmsr
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mov eax, cr4
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and al, ~ (1 << 5) ; Clear PAE
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mov cr4, eax
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pop edx
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add esp, 4
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pop ecx,
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add esp, 4
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cmp cl, 1 ; Check mwait-monitor support
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jnz HltLoop
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mov ebx, edx ; Save C-State to ebx
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MwaitLoop:
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mov eax, esp ; Set Monitor Address
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xor ecx, ecx ; ecx = 0
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xor edx, edx ; edx = 0
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monitor
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mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4]
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shl eax, 4
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mwait
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jmp MwaitLoop
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HltLoop:
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cli
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hlt
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jmp HltLoop
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BITS 64
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AsmRelocateApLoopEnd:
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;-------------------------------------------------------------------------------------
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; AsmGetAddressMap (&AddressMap);
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;-------------------------------------------------------------------------------------
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global ASM_PFX(AsmGetAddressMap)
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ASM_PFX(AsmGetAddressMap):
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lea rax, [ASM_PFX(RendezvousFunnelProc)]
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mov qword [rcx], rax
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mov qword [rcx + 8h], LongModeStart - RendezvousFunnelProcStart
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mov qword [rcx + 10h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
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lea rax, [ASM_PFX(AsmRelocateApLoop)]
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mov qword [rcx + 18h], rax
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mov qword [rcx + 20h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
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ret
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;-------------------------------------------------------------------------------------
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;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
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;about to become an AP. It switches its stack with the current AP.
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;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
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;-------------------------------------------------------------------------------------
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global ASM_PFX(AsmExchangeRole)
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ASM_PFX(AsmExchangeRole):
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; DO NOT call other functions in this function, since 2 CPU may use 1 stack
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; at the same time. If 1 CPU try to call a function, stack will be corrupted.
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push rax
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push rbx
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push rcx
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push rdx
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push rsi
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push rdi
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push rbp
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push r8
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push r9
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push r10
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push r11
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push r12
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push r13
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push r14
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push r15
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mov rax, cr0
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push rax
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mov rax, cr4
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push rax
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; rsi contains MyInfo pointer
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mov rsi, rcx
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; rdi contains OthersInfo pointer
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mov rdi, rdx
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;Store EFLAGS, GDTR and IDTR regiter to stack
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pushfq
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sgdt [rsi + 16]
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sidt [rsi + 26]
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; Store the its StackPointer
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mov [rsi + 8], rsp
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; update its switch state to STORED
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mov byte [rsi], CPU_SWITCH_STATE_STORED
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WaitForOtherStored:
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; wait until the other CPU finish storing its state
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cmp byte [rdi], CPU_SWITCH_STATE_STORED
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jz OtherStored
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pause
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jmp WaitForOtherStored
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OtherStored:
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; Since another CPU already stored its state, load them
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; load GDTR value
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lgdt [rdi + 16]
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; load IDTR value
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lidt [rdi + 26]
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; load its future StackPointer
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mov rsp, [rdi + 8]
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; update the other CPU's switch state to LOADED
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mov byte [rdi], CPU_SWITCH_STATE_LOADED
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WaitForOtherLoaded:
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; wait until the other CPU finish loading new state,
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; otherwise the data in stack may corrupt
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cmp byte [rsi], CPU_SWITCH_STATE_LOADED
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jz OtherLoaded
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pause
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jmp WaitForOtherLoaded
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OtherLoaded:
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; since the other CPU already get the data it want, leave this procedure
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popfq
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pop rax
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mov cr4, rax
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pop rax
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mov cr0, rax
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pop r15
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pop r14
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pop r13
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pop r12
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pop r11
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pop r10
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pop r9
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pop r8
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pop rbp
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pop rdi
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pop rsi
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pop rdx
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pop rcx
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pop rbx
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pop rax
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ret
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