mirror of https://github.com/acidanthera/audk.git
75 lines
2.0 KiB
C
75 lines
2.0 KiB
C
/** @file
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Support for PCI 2.3 standard.
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Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _PCI23_H_
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#define _PCI23_H_
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#include <IndustryStandard/Pci22.h>
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///
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/// PCI_CLASS_MASS_STORAGE, Base Class 01h.
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///
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///@{
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#define PCI_CLASS_MASS_STORAGE_ATA 0x05
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#define PCI_IF_MASS_STORAGE_SINGLE_DMA 0x20
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#define PCI_IF_MASS_STORAGE_CHAINED_DMA 0x30
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///@}
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///
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/// PCI_CLASS_SERIAL, Base Class 0Ch.
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///
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///@{
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#define PCI_IF_EHCI 0x20
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#define PCI_CLASS_SERIAL_IB 0x06
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///@}
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///
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/// defined in PCI Express Spec.
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///
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#define PCI_EXP_MAX_CONFIG_OFFSET 0x1000
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///
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/// PCI Capability List IDs and records.
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///
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#define EFI_PCI_CAPABILITY_ID_PCIX 0x07
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#pragma pack(1)
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///
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/// PCI-X Capabilities List,
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/// Section 7.2, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b.
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///
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typedef struct {
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EFI_PCI_CAPABILITY_HDR Hdr;
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UINT16 CommandReg;
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UINT32 StatusReg;
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} EFI_PCI_CAPABILITY_PCIX;
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///
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/// PCI-X Bridge Capabilities List,
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/// Section 8.6.2, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b.
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///
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typedef struct {
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EFI_PCI_CAPABILITY_HDR Hdr;
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UINT16 SecStatusReg;
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UINT32 StatusReg;
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UINT32 SplitTransCtrlRegUp;
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UINT32 SplitTransCtrlRegDn;
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} EFI_PCI_CAPABILITY_PCIX_BRDG;
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#pragma pack()
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#define PCI_CODE_TYPE_EFI_IMAGE 0x03
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#endif
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