mirror of https://github.com/acidanthera/audk.git
106 lines
2.5 KiB
C
106 lines
2.5 KiB
C
/** @file
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Macros and type definitions for LSI 53C895A SCSI devices.
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Copyright (C) 2020, SUSE LLC.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _LSI_SCSI_H_
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#define _LSI_SCSI_H_
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//
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// Device ID
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//
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#define LSI_LOGIC_PCI_VENDOR_ID 0x1000
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#define LSI_53C895A_PCI_DEVICE_ID 0x0012
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//
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// LSI 53C895A Registers
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//
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#define LSI_REG_DSTAT 0x0C
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#define LSI_REG_ISTAT0 0x14
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#define LSI_REG_DSP 0x2C
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#define LSI_REG_SIST0 0x42
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#define LSI_REG_SIST1 0x43
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#define LSI_REG_CSBC 0xDC
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//
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// The status bits for DMA Status (DSTAT)
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//
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#define LSI_DSTAT_IID BIT0
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#define LSI_DSTAT_R BIT1
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#define LSI_DSTAT_SIR BIT2
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#define LSI_DSTAT_SSI BIT3
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#define LSI_DSTAT_ABRT BIT4
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#define LSI_DSTAT_BF BIT5
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#define LSI_DSTAT_MDPE BIT6
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#define LSI_DSTAT_DFE BIT7
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//
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// The status bits for Interrupt Status Zero (ISTAT0)
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//
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#define LSI_ISTAT0_DIP BIT0
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#define LSI_ISTAT0_SIP BIT1
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#define LSI_ISTAT0_INTF BIT2
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#define LSI_ISTAT0_CON BIT3
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#define LSI_ISTAT0_SEM BIT4
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#define LSI_ISTAT0_SIGP BIT5
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#define LSI_ISTAT0_SRST BIT6
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#define LSI_ISTAT0_ABRT BIT7
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//
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// The status bits for SCSI Interrupt Status Zero (SIST0)
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//
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#define LSI_SIST0_PAR BIT0
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#define LSI_SIST0_RST BIT1
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#define LSI_SIST0_UDC BIT2
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#define LSI_SIST0_SGE BIT3
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#define LSI_SIST0_RSL BIT4
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#define LSI_SIST0_SEL BIT5
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#define LSI_SIST0_CMP BIT6
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#define LSI_SIST0_MA BIT7
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//
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// The status bits for SCSI Interrupt Status One (SIST1)
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//
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#define LSI_SIST1_HTH BIT0
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#define LSI_SIST1_GEN BIT1
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#define LSI_SIST1_STO BIT2
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#define LSI_SIST1_R3 BIT3
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#define LSI_SIST1_SBMC BIT4
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#define LSI_SIST1_R5 BIT5
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#define LSI_SIST1_R6 BIT6
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#define LSI_SIST1_R7 BIT7
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//
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// LSI 53C895A Script Instructions
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//
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#define LSI_INS_TYPE_BLK 0x00000000
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#define LSI_INS_TYPE_IO BIT30
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#define LSI_INS_TYPE_TC BIT31
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#define LSI_INS_BLK_SCSIP_DAT_OUT 0x00000000
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#define LSI_INS_BLK_SCSIP_DAT_IN BIT24
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#define LSI_INS_BLK_SCSIP_CMD BIT25
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#define LSI_INS_BLK_SCSIP_STAT (BIT24 | BIT25)
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#define LSI_INS_BLK_SCSIP_MSG_OUT (BIT25 | BIT26)
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#define LSI_INS_BLK_SCSIP_MSG_IN (BIT24 | BIT25 | BIT26)
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#define LSI_INS_IO_OPC_SEL 0x00000000
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#define LSI_INS_IO_OPC_WAIT_RESEL BIT28
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#define LSI_INS_TC_CP BIT17
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#define LSI_INS_TC_JMP BIT19
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#define LSI_INS_TC_RA BIT23
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#define LSI_INS_TC_OPC_JMP 0x00000000
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#define LSI_INS_TC_OPC_INT (BIT27 | BIT28)
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#define LSI_INS_TC_SCSIP_DAT_OUT 0x00000000
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#define LSI_INS_TC_SCSIP_MSG_IN (BIT24 | BIT25 | BIT26)
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#endif // _LSI_SCSI_H_
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