mirror of https://github.com/acidanthera/audk.git
210 lines
7.1 KiB
C
210 lines
7.1 KiB
C
/** @file
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Intel FSP API definition from Intel Firmware Support Package External
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Architecture Specification, April 2014, revision 001.
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _FSP_API_H_
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#define _FSP_API_H_
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typedef UINT32 FSP_STATUS;
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#define FSPAPI EFIAPI
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/**
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FSP Init continuation function prototype.
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Control will be returned to this callback function after FspInit API call.
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@param[in] Status Status of the FSP INIT API.
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@param[in] HobBufferPtr Pointer to the HOB data structure defined in the PI specification.
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**/
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typedef
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VOID
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(* CONTINUATION_PROC) (
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IN FSP_STATUS Status,
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IN VOID *HobListPtr
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);
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#pragma pack(1)
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typedef struct {
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///
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/// Base address of the microcode region.
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///
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UINT32 MicrocodeRegionBase;
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///
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/// Length of the microcode region.
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///
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UINT32 MicrocodeRegionLength;
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///
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/// Base address of the cacheable flash region.
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///
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UINT32 CodeRegionBase;
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///
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/// Length of the cacheable flash region.
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///
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UINT32 CodeRegionLength;
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} FSP_TEMP_RAM_INIT_PARAMS;
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typedef struct {
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///
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/// Non-volatile storage buffer pointer.
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///
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VOID *NvsBufferPtr;
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///
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/// Runtime buffer pointer
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///
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VOID *RtBufferPtr;
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///
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/// Continuation function address
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///
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CONTINUATION_PROC ContinuationFunc;
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} FSP_INIT_PARAMS;
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typedef struct {
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///
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/// Stack top pointer used by the bootloader.
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/// The new stack frame will be set up at this location after FspInit API call.
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///
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UINT32 *StackTop;
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///
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/// Current system boot mode.
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///
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UINT32 BootMode;
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///
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/// User platform configuraiton data region pointer.
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///
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VOID *UpdDataRgnPtr;
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///
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/// Reserved
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///
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UINT32 Reserved[7];
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} FSP_INIT_RT_COMMON_BUFFER;
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typedef enum {
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///
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/// Notification code for post PCI enuermation
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///
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EnumInitPhaseAfterPciEnumeration = 0x20,
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///
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/// Notification code before transfering control to the payload
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///
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EnumInitPhaseReadyToBoot = 0x40
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} FSP_INIT_PHASE;
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typedef struct {
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///
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/// Notification phase used for NotifyPhase API
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///
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FSP_INIT_PHASE Phase;
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} NOTIFY_PHASE_PARAMS;
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#pragma pack()
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/**
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This FSP API is called soon after coming out of reset and before memory and stack is
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available. This FSP API will load the microcode update, enable code caching for the
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region specified by the boot loader and also setup a temporary stack to be used until
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main memory is initialized.
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A hardcoded stack can be set up with the following values, and the "esp" register
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initialized to point to this hardcoded stack.
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1. The return address where the FSP will return control after setting up a temporary
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stack.
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2. A pointer to the input parameter structure
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However, since the stack is in ROM and not writeable, this FSP API cannot be called
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using the "call" instruction, but needs to be jumped to.
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@param[in] TempRaminitParamPtr Address pointer to the FSP_TEMP_RAM_INIT_PARAMS structure.
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@retval FSP_SUCCESS Temp RAM was initialized successfully.
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@retval FSP_INVALID_PARAMETER Input parameters are invalid..
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@retval FSP_NOT_FOUND No valid microcode was found in the microcode region.
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@retval FSP_UNSUPPORTED The FSP calling conditions were not met.
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@retval FSP_DEVICE_ERROR Temp RAM initialization failed.
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If this function is successful, the FSP initializes the ECX and EDX registers to point to
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a temporary but writeable memory range available to the boot loader and returns with
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FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary
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memory range and EDX points to the end of the range. Boot loader is free to use the
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whole range described. Typically the boot loader can reload the ESP register to point
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to the end of this returned range so that it can be used as a standard stack.
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**/
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typedef
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FSP_STATUS
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(FSPAPI *FSP_TEMP_RAM_INIT) (
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IN FSP_TEMP_RAM_INIT_PARAMS *FspTempRamInitPtr
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);
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/**
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This FSP API is called after TempRamInitEntry. This FSP API initializes the memory,
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the CPU and the chipset to enable normal operation of these devices. This FSP API
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accepts a pointer to a data structure that will be platform dependent and defined for
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each FSP binary. This will be documented in the Integration Guide for each FSP
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release.
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The boot loader provides a continuation function as a parameter when calling FspInit.
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After FspInit completes its execution, it does not return to the boot loader from where
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it was called but instead returns control to the boot loader by calling the continuation
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function which is passed to FspInit as an argument.
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@param[in] FspInitParamPtr Address pointer to the FSP_INIT_PARAMS structure.
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@retval FSP_SUCCESS FSP execution environment was initialized successfully.
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@retval FSP_INVALID_PARAMETER Input parameters are invalid.
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@retval FSP_UNSUPPORTED The FSP calling conditions were not met.
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@retval FSP_DEVICE_ERROR FSP initialization failed.
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**/
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typedef
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FSP_STATUS
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(FSPAPI *FSP_FSP_INIT) (
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IN OUT FSP_INIT_PARAMS *FspInitParamPtr
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);
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/**
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This FSP API is used to notify the FSP about the different phases in the boot process.
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This allows the FSP to take appropriate actions as needed during different initialization
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phases. The phases will be platform dependent and will be documented with the FSP
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release. The current FSP supports two notify phases:
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Post PCI enumeration
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Ready To Boot
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@param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS
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@retval FSP_SUCCESS The notification was handled successfully.
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@retval FSP_UNSUPPORTED The notification was not called in the proper order.
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@retval FSP_INVALID_PARAMETER The notification code is invalid.
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**/
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typedef
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FSP_STATUS
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(FSPAPI *FSP_NOTIFY_PHASE) (
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IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr
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);
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///
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/// FSP API Return Status Code
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///
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#define FSP_SUCCESS 0x00000000
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#define FSP_INVALID_PARAMETER 0x80000002
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#define FSP_UNSUPPORTED 0x80000003
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#define FSP_NOT_READY 0x80000006
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#define FSP_DEVICE_ERROR 0x80000007
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#define FSP_OUT_OF_RESOURCES 0x80000009
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#define FSP_VOLUME_CORRUPTED 0x8000000A
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#define FSP_NOT_FOUND 0x8000000E
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#define FSP_TIMEOUT 0x80000012
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#define FSP_ABORTED 0x80000015
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#define FSP_INCOMPATIBLE_VERSION 0x80000010
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#define FSP_SECURITY_VIOLATION 0x8000001A
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#define FSP_CRC_ERROR 0x8000001B
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#endif
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